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git://projects.qi-hardware.com/antorcha.git
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56476539cf
The boot loader currently uses the protocol switch intended for the application. This makes it too big to fit in the very limiting constraints the ATmega168 poses - and there's not even cryptographic authentication yet. We'll have to dumb it down quite a bit.
139 lines
2.7 KiB
C
139 lines
2.7 KiB
C
/*
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* fw/rf.c - RF interface
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*
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* Written 2012 by Werner Almesberger
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* Copyright 2012 Werner Almesberger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <stdint.h>
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#include <avr/io.h>
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#define F_CPU 8000000UL
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#include <util/delay.h>
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#include "at86rf230.h"
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#include "io.h"
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#include "spi.h"
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#include "rf.h"
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/*
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* According to IEEE 802.15.4-2003 section E.2.6, channel 15 is the only
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* channel that falls into the 802.11 guard bands in North America an Europe.
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*/
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#define DEFAULT_CHAN 15 /* channel 15, 2425 MHz */
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/*
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* Transmit power, dBm. IEEE 802.15.4-2003 section E.3.1.3 specifies a transmit
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* power of 0 dBm for IEEE 802.15.4. We assume an antenna gain of 3 dB or
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* better.
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*/
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#define DEFAULT_POWER -3.2 /* transmit power, dBm */
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static uint8_t reg_read(uint8_t reg)
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{
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uint8_t value;
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spi_begin();
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spi_send(AT86RF230_REG_READ | reg);
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value = spi_recv();
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spi_end();
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return value;
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}
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static void reg_write(uint8_t reg, uint8_t value)
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{
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spi_begin();
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spi_send(AT86RF230_REG_WRITE | reg);
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spi_send(value);
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spi_end();
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}
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void rf_init(void)
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{
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spi_init();
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CLR(RF_nRST);
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_delay_us(10); /* tTR10 = 625 ns */
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SET(RF_nRST);
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_delay_us(40); /* tTR13 = 37 us */
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reg_write(REG_TRX_STATE, TRX_CMD_TRX_OFF);
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_delay_us(40); /* tTR13 = 37 us */
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reg_write(REG_PHY_CC_CCA, DEFAULT_CHAN);
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reg_write(REG_TRX_STATE, TRX_CMD_RX_ON);
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_delay_us(200); /* tTR19(max) = 166 us */
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//reg_write(REG_IRQ_MASK, IRQ_TRX_END);
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reg_write(REG_IRQ_MASK, 0xff);
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reg_read(REG_IRQ_STATUS);
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}
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void rf_send(const void *buf, uint8_t size)
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{
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uint8_t i;
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reg_write(REG_TRX_STATE, TRX_CMD_PLL_ON);
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_delay_us(1); /* tTR9 = 1 us */
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spi_begin();
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spi_send(AT86RF230_BUF_WRITE);
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spi_send(size+2); /* CRC */
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for (i = 0; i != size; i++)
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spi_send(((const uint8_t *) buf)[i]);
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spi_end();
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reg_read(REG_IRQ_STATUS);
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reg_write(REG_TRX_STATE, TRX_CMD_TX_START);
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_delay_us(16); /* tTR10 = 16 us */
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while (!(reg_read(REG_IRQ_STATUS) & IRQ_TRX_END)) {
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PORTC = 1;
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PORTC = 0;
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}
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reg_write(REG_TRX_STATE, TRX_CMD_RX_ON);
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_delay_us(1); /* tTR8 = 1 us */
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}
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uint8_t rf_recv(void *buf, uint8_t size)
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{
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uint8_t irq, len, i;
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irq = reg_read(REG_IRQ_STATUS);
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if (!(irq & IRQ_TRX_END))
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return 0;
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if (!(reg_read(REG_PHY_RSSI) & RX_CRC_VALID))
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return 0;
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spi_begin();
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spi_send(AT86RF230_BUF_READ);
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len = spi_recv();
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if (!len || (len & 0x80)) {
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spi_end();
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return 0;
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}
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if (size > len)
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size = len;
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for (i = 0; i != size; i++)
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((uint8_t *) buf)[i] = spi_recv();
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spi_end();
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return len;
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}
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