qi-hardware/ben-blinkenlights
1
0
Fork 0
mirror of git://projects.qi-hardware.com/ben-blinkenlights.git synced 2024-12-27 10:28:59 +02:00
Code

libubb/mmcclk.c (BUS_LIMIT_MHZ): explain the 56 MHz limit

Browse Source
This commit is contained in:
Werner Almesberger 2013-01-15 18:01:27 -03:00
parent 1c76cab66c
commit 10b0dea29c
1 changed files with 10 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
libubb/mmcclk.c
View File

@ -18,7 +18,16 @@
#define MSCCDR_MAX 32
#define CLKRT_MAX 8
#define BUS_LIMIT_MHZ 56 /* nominally, the limit is 20 MHz */
/*
* Nominally, the limit is 20 MHz. A clock can be obtained until 84 MHz,
* possibly even higher. Beyond 56 MHz, the MMC controller in some Bens
* has been observed to fail to complete the operation when attempting
* data transmission.
*
* Some Bens still work fine at 84 MHz.
*/
#define BUS_LIMIT_MHZ 56
static int calculate_clock(struct mmcclk *dsc)