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mirror of git://projects.qi-hardware.com/ben-blinkenlights.git synced 2025-04-21 12:27:27 +03:00

uart/: great renaming to nxuart, including references in Makefile

This commit is contained in:
Werner Almesberger
2011-03-07 14:42:44 -03:00
parent 271a50f3c2
commit 5b14b505b4
17 changed files with 21 additions and 21 deletions

31
nxuart/Makefile Normal file
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PLOT_BRD = pcbnew --plot=ps_a4 --ps-pads-drill-opt=none --fill-all-zones
NAME = nxuart
.PHONY: all sch brd front back clean
all:
@echo "make what ? target: sch brd front back clean"
@exit 1
sch:
eeschema `pwd`/$(NAME).sch
brd:
pcbnew `pwd`/$(NAME).brd
front: $(NAME)-Front.ps
lpr $<
back: $(NAME)-Back.ps
lpr $<
%-Front.ps: %.brd
$(PLOT_BRD) -l Front --mirror $<
%-Back.ps: %.brd
$(PLOT_BRD) -l Back $<
clean:
rm -f $(NAME)-Front.ps $(NAME)-Back.ps
rm -f $(NAME).drl $(NAME)-PCB_Edges.gbr

45
nxuart/bom/Makefile Normal file
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BOOM=PATH=/home/moko/svn.openmoko.org/trunk/eda/boom:../boom:$$PATH boom
BOOM2=../../../eda-tools/boom
BOOM_CONFIG=$(BOOM2)/boom-config
KITS=1
EQU=uart.equ dk/digi-key.equ $(shell $(BOOM_CONFIG) equ)
INV=uart.inv dk/digi-key.inv $(shell $(BOOM_CONFIG) inv)
DSC=dk/digi-key.dsc $(shell $(BOOM_CONFIG) dsc)
CHR=$(shell $(BOOM_CONFIG) chr)
.PHONY: all again spotless
.PRECIOUS: %.par %.lst
all: uart.ord
again:
$(MAKE) spotless
$(MAKE) all
%.ord: %.par $(INV) $(EQU)
$(BOOM) part2order $(KITS) $^ >$@ || { rm -f $@; exit 1; }
%.par: $(EQU) $(INV) $(CHR) %.lst uart.sub
$(BOOM) bom2part $^ >$@ || { rm -f $@; exit 1; }
dk/digi-key.inv:
$(MAKE) -C dk digi-key.inv
dk/digi-key.dsc:
$(MAKE) -C dk digi-key.dsc
%.lst: ../*.sch ../*.cmp
eeschema --bom `pwd`/../$*.sch
mv ../$*.lst .
show-%: %.ord $(DSC)
grep -vw UART $< | $(BOOM) prettyord -t - $(DSC) | \
sed 's/^... //'
spotless:
$(MAKE) -C dk spotless
rm -f uart.lst uart.par uart.ord

37
nxuart/bom/dk/Makefile Normal file
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CACHE=query.data
.PHONY: update regen regenerate clean spotless
all: digi-key.dsc digi-key.inv
$(CACHE): digi-key.equ
awk '/^#END/ { exit } /^DIGI-KEY / { print $$2 }' \
digi-key.equ | \
perl ./dk-db.pl query \
`[ -r $(CACHE) ] && echo '' -i $(CACHE)` >_$@ || \
{ rm -f $@ _$@; exit 1; }
mv _$@ $@
digi-key.dsc: $(CACHE)
perl ./dk-db.pl dsc $(CACHE) >$@ || { rm -f $@; exit 1; }
digi-key.inv: $(CACHE)
perl ./dk-db.pl inv $(CACHE) >$@ || { rm -f $@; exit 1; }
update:
$(MAKE) clean all
regen regenerate:
rm -f digi-key.dsc digi-key.inv
$(MAKE) all
clean:
rm -f $(CACHE) _$(CACHE)
#
# we don't do a "make clean" on "make spotless", so that things like "make
# optimist" don't erase the cache.
#
spotless:
rm -f digi-key.dsc digi-key.inv _$(CACHE)

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#EQU
# MCU
DIGI-KEY ATMEGA48-20MMU-ND ATMEL ATMEGA48-20MMU
# LEDs
DIGI-KEY 160-1436-1-ND LITE-ON LTST-C190KRKT
# Header
DIGI-KEY 3M9468-ND 3M 961103-5604-AR

105
nxuart/bom/dk/dk-db.pl Executable file
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#!/usr/bin/perl
sub rows
{
local $s = $_[0];
my @res = ();
while ($s =~ m#.*?<tr>(.*?)</tr>#) {
push(@res, $1);
$s = $';
}
return @res;
}
sub cols
{
local $s = $_[0];
my @res = ();
while ($s =~ m#.*?<td[^>]*>(.*?)</td>#) {
push(@res, $1);
$s = $';
}
return @res;
}
sub usage
{
print STDERR "usage: $0 (query [-i cache_file] | dsc | inv) [file ...]\n";
exit(1);
}
$mode = shift @ARGV;
&usage unless $mode eq "query" || $mode eq "dsc" || $mode eq "inv";
if ($mode eq "query") {
if ($ARGV[0] eq "-i") {
shift @ARGV;
$name = shift @ARGV;
open(OLD, $name) || die "$name: $!";
$q = join("", <OLD>);
($old = $q) =~ tr/\r\n//d;
close OLD;
}
while (<>) {
chop;
s/#.*//;
next if /^\s*$/;
next if /^\s/;
s/\s.*//;
next if $old =~ m#align=right>Digi-Key Part Number</th><td>$_</td#;
push(@pn, $_);
}
if (0+@pn) {
$cmd = "wget -nv -O - ".join(" ",
map
"http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail\\&name=$_",
@pn);
$q .= `$cmd`;
}
print $q;
exit;
}
$q = join("", <>);
$q =~ tr/\r\n//d;
print "#DSC\n" if $mode eq "dsc";
print "#INV\n" if $mode eq "inv";
print "# MACHINE-GENERATED. DO NOT EDIT !\n";
print "# ", `date -u`;
for (split(/<!DOCTYPE HTML/, $q)) {
next unless m#align=right>Digi-Key Part Number</th><td>([^<]+)</td#;
$pn = $1;
$qty = 0;
if (m#align=right>Quantity Available</th><td[^>]*>([0-9,]+)<#) {
($qty = $1) =~ tr/,//d;
}
next unless m#align=right>Description</th><td>(.*?)</td#;
$dsc = $1;
next unless m#<table.*<th>Price Break<(.*?)</table>#;
if ($mode eq "dsc") {
print "DIGI-KEY $pn $dsc\n";
next;
}
print "DIGI-KEY $pn $qty USD";
for (&rows($1)) {
@c = &cols($_);
next unless $c[0] =~ /^[0-9,]+$/;
next unless $c[1] =~ /^[0-9.]+$/;
$c[0] =~ tr/,//d;
$c[1] =~ tr/,//d; # let's hope we don't need this one often :)
$c[1] =~ s/0+$// if $c[1] =~ /\./;
print " $c[0] $c[1]";
}
print "\n";
}

5
nxuart/bom/uart.equ Normal file
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#EQU
ATMEL ATMEGA48-MMU ATMEL ATMEGA48-20MMU
UART 3M_961103-5604-AR 3M 961103-5604-AR

6
nxuart/bom/uart.inv Normal file
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#INV
# Pseudo-inventory for PCB features.
UART 8:10-card 999999 USD 1 0
UART PAD_2mm 999999 USD 1 0

80
nxuart/bom/uart.sub Normal file
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#SUB
# From ben-wpan/bom, which in turn inherited it from gta02-core
-> T=unknown
R[0-9P]* { # also handle RP...
-> T=R
VAL=*[0-9] -> R=${VAL}R
VAL=$R -> R=$VAL
# -> TOL=5%
FN=$% -> TOL=$FN
}
RP[0-9]* {
-> T=RA
RP220[123] -> ARRAY=4
# the other parameters have already been taken care of by R*
}
C[0-9]* {
-> T=C
VAL=*F -> C=$VAL
VAL=(*F)/RF -> C=$VAL:1 X=RF # *F/RF "wins" against the *F above
FN=*V -> V=>=$FN
}
L[0-9]* {
-> T=L
VAL=*H -> L=$VAL
FN=*A -> I=>=$FN
}
B[0-9]* {
-> T=FILTER M=BEAD
VAL=$R -> R=$VAL
FN=*A -> I=$FN
FN=*R -> Rdc=$FN
FN=0.45R -> Rdc=450mR # hack
}
D[0-9]* {
-> T=D
VAL=*F { # heuristic to detect TVS
-> M=TVS
VAL=*F -> C=<=$VAL
FN=(*V)ac -> Vac=$FN:1
FN=(*V)dc -> Vdc=$FN:1
#
# Hack: some companies specify the class of varistors with Vdc = 9 V
# as Vac = 6.5 V while others use Vac = 7 V. Sometimes, Vac is even
# omitted entirely.
#
# Here, we work around the issue that Karmax use Vac = 6.5 V,
# Cooper/Bussmann use Vac = 7V if at all, and out schematics specify
# Vac = 6.5 V.
#
Vac=6.5V {
-> Vac=
-> Vdc=9V
}
}
}
VR[0-9]* -> T=D M=TVS {
VAL=$V -> Vdc=$VAL # neither clean nor consistent with the above
FN=*F -> C=<=$FN
}
X[0-9]* {
-> T=XTAL
VAL=*Hz -> F=$VAL
FN=*F -> C=$FN
FN=*ppm -> TOL=<=$FN
}
FP=8:10-card -> VAL=8:10-card
FP=PAD_2mm -> VAL=PAD_2mm

19
nxuart/cam/Makefile Normal file
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.PHONY: all clean
NAME=nxuart
all: Makefile.mkmk
Makefile.mkmk: mkmk ../$(NAME).drl ../$(NAME)-PCB_Edges.gbr
./mkmk
../$(NAME).drl: ../$(NAME).brd
pcbnew --drill `pwd`/../$(NAME).brd
../$(NAME)-PCB_Edges.gbr: ../$(NAME).brd
pcbnew --plot=gerber -l PCB_Edges `pwd`/../$(NAME).brd
-include Makefile.mkmk
clean::
rm -f Makefile.mkmk

69
nxuart/cam/mkmk Executable file
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#!/bin/sh
PATH=$PATH:/home/qi/cae-tools/cameo
PATH=$PATH:/home/moko/svn.openmoko.org/developers/werner/cncmap/gp2rml
NAME=nxuart
X=2
Y=0
cameo <<EOF
mm
gerber 35mil ../$NAME-PCB_Edges.gbr
align 1 8.9mm 10.4mm # align relative to board corner
translate 4mm 4mm # move to PCB zone assigned to project
array +3mm +3mm $X $Y
z 0 -58.9mm # board surface (tool fully retracted)
z 1.5mm # slack for extending the tool
z -0.8mm # board thickness
z -0.5mm # tool extra depth
clear
excellon ../$NAME.drl
drill 7mil 15mil # 12.5-13.5 mil drill
optimize
write drill.gp
remainder
mill 25mil 0.01mm # 35 mil endmill; pretend it is a little smaller,
# to compensate for tool/board deflections
write mill.gp
remainder
empty
gerber 45mil ../$NAME-PCB_Edges.gbr # 35 mil endmill, -10 mil deflection
offset
append mill.gp
EOF
gp2rml 2 0.5 0.5 mill.gp >mill.rml
gp2rml 2 0.1 0.5 drill.gp >drill.rml
cat <<EOF >Makefile.mkmk
SPOOL=/home/moko/svn.openmoko.org/developers/werner/cncmap/spool/spool
CNGT=/home/qi/cae-tools/cngt/cngt
.PHONY: mill drill cng plot dplot
mill:
PORT=/dev/ttyUSB0 \$(SPOOL) mill.rml
drill:
PORT=/dev/ttyUSB0 \$(SPOOL) drill.rml
cng:
\$(CNGT) -57.4 20 mill.gp
plot:
echo 'plot "drill.gp" with points, "mill.gp" with lines' | \\
gnuplot -persist
dplot:
echo 'plot "< sed /^\$\$/d drill.gp" with linespoints' | \\
gnuplot -persist
clean::
rm -f mill.gp mill.rml drill.gp drill.rml
EOF

25
nxuart/fw/Makefile Normal file
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CFLAGS = -g -Wall -Wshadow -Werror \
-Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations
CHIP=atmega48
AVR_PREFIX = $(BIN_PATH) avr-
CC = $(AVR_PREFIX)gcc
OBJCOPY = $(AVR_PREFIX)objcopy
#OBJDUMP = $(AVR_PREFIX)objdump
.PHONY: all upload prog
all: uart.bin
%.elf: %.c
$(CC) -mmcu=$(CHIP) -Os -o $@ $<
%.bin: %.elf
$(OBJCOPY) -j .text -j .data -O binary $< $@
upload: uart.bin
scp uart.bin jlime:
prog:
ssh jlime avrdude -p atmega48 -c nanonote_uart -e -U flash:w:uart.bin:r

19
nxuart/fw/uart.c Normal file
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#include <stdint.h>
#include <avr/io.h>
#define F_CPU 1000000UL
#include <util/delay.h>
#define LED 2 /* PD2 */
int main(void)
{
DDRD = 1 << LED;
while (1) {
PORTD ^= 1 << LED;
_delay_ms(50);
}
}

1393
nxuart/nxuart.brd Normal file

File diff suppressed because it is too large Load Diff

80
nxuart/nxuart.cmp Normal file
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Cmp-Mod V01 Created by CvPCB (2010-12-27 BZR 2685)-unstable date = Mon Jan 31 18:30:06 2011
BeginCmp
TimeStamp = /4D470731;
Reference = C1;
ValeurCmp = 100nF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4D47260E;
Reference = D1;
ValeurCmp = LED;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4D4704D9;
Reference = K1;
ValeurCmp = CONN_3;
IdModule = PIN_ARRAY_3X1;
EndCmp
BeginCmp
TimeStamp = /4D4702F7;
Reference = P1;
ValeurCmp = 8:10-CARD;
IdModule = 8:10-card;
EndCmp
BeginCmp
TimeStamp = /4D472714;
Reference = P2;
ValeurCmp = CONN_1;
IdModule = PAD_2mm;
EndCmp
BeginCmp
TimeStamp = /4D472716;
Reference = P3;
ValeurCmp = CONN_1;
IdModule = PAD_2mm;
EndCmp
BeginCmp
TimeStamp = /4D47292F;
Reference = P4;
ValeurCmp = CONN_1;
IdModule = PAD_2mm;
EndCmp
BeginCmp
TimeStamp = /4D47052C;
Reference = R1;
ValeurCmp = 100;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4D47052E;
Reference = R2;
ValeurCmp = 100;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4D472610;
Reference = R3;
ValeurCmp = 68;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4D4702FE;
Reference = U1;
ValeurCmp = ATMEGA48-MMU;
IdModule = QFN28-Atmel;
EndCmp
EndListe

71
nxuart/nxuart.pro Normal file
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update=Mon Jan 31 19:00:31 2011
last_client=pcbnew
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
LabSize=60
PrintMonochrome=1
ShowSheetReferenceAndTitleBlock=1
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=conn
LibName4=../../kicad-libs/components/8_10-card
LibName5=../components/atmega48-mmu
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
PadDrlX=400
PadDimH=800
PadDimV=800
BoardThickness=630
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
VEgarde=100
DrawLar=50
EdgeLar=50
TxtLar=120
MSegLar=150
LastNetListRead=uart.net
[pcbnew/libraries]
LibDir=
LibName1=pin_array
LibName2=../../kicad-libs/modules/stdpass
LibName3=../../kicad-libs/modules/8_10-card
LibName4=../../ben-wpan/modules/qfn
LibName5=../../kicad-libs/modules/pads

338
nxuart/nxuart.sch Normal file
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EESchema Schematic File Version 2 date Sun Feb 6 17:42:09 2011
LIBS:power
LIBS:device
LIBS:conn
LIBS:8_10-card
LIBS:atmega48-mmu
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 1 1
Title "External UART (3.3 V) as 8:10 card"
Date "2 feb 2011"
Rev "20110131"
Comp "Werner Almesberger"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Wire Wire Line
4950 4550 4950 5350
Wire Wire Line
4950 5350 8050 5350
Wire Wire Line
3100 3600 2700 3600
Wire Wire Line
2700 3600 2700 4550
Wire Wire Line
2700 4550 2400 4550
Wire Wire Line
2400 4750 4350 4750
Wire Wire Line
4350 4750 4350 4550
Wire Wire Line
3450 1550 3650 1550
Wire Wire Line
5250 4550 5250 5850
Wire Wire Line
5250 5850 8050 5850
Wire Wire Line
8050 5150 6200 5150
Wire Wire Line
1850 3600 1850 4000
Wire Wire Line
3100 3000 1850 3000
Wire Wire Line
6700 3450 6500 3450
Wire Wire Line
3100 3300 2900 3300
Wire Wire Line
2900 3300 2900 5550
Wire Wire Line
2900 5550 8050 5550
Wire Wire Line
4300 1050 4500 1050
Wire Wire Line
3300 1050 3800 1050
Wire Wire Line
3500 1250 3500 950
Wire Wire Line
3500 950 3300 950
Wire Wire Line
4500 1050 4500 1750
Wire Wire Line
4650 1750 4650 850
Wire Wire Line
3300 850 3800 850
Wire Wire Line
4650 850 4300 850
Wire Wire Line
5700 4550 5700 4750
Wire Wire Line
6500 3600 6700 3600
Wire Wire Line
7250 6050 7250 5650
Wire Wire Line
7250 5650 8050 5650
Wire Wire Line
6500 3150 6700 3150
Wire Wire Line
8050 5450 7250 5450
Wire Wire Line
7250 5450 7250 4950
Wire Wire Line
1850 3200 1850 2800
Connection ~ 1850 3000
Wire Wire Line
1850 3800 2350 3800
Connection ~ 1850 3800
Wire Wire Line
2350 3800 2350 3150
Wire Wire Line
2350 3150 3100 3150
Wire Wire Line
4800 1750 4800 850
Wire Wire Line
4800 850 5350 850
Wire Wire Line
8050 5750 6700 5750
Wire Wire Line
6700 5750 6700 3600
Wire Wire Line
2850 1750 2850 1550
Wire Wire Line
2850 1550 3050 1550
Wire Wire Line
4350 1750 4350 1550
Wire Wire Line
4350 1550 4150 1550
Wire Wire Line
2400 4950 4500 4950
Wire Wire Line
4500 4950 4500 4550
Wire Wire Line
8050 5250 5100 5250
Wire Wire Line
5100 5250 5100 4550
Text Label 7550 5350 0 60 ~ 0
nSS
NoConn ~ 6500 2700
$Comp
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U 1 1 4D47292F
P 2250 4950
F 0 "P4" H 2330 4950 40 0000 L CNN
F 1 "CONN_1" H 2250 5005 30 0001 C CNN
F 2 "PAD_2mm" H 2250 4950 60 0001 C CNN
1 2250 4950
-1 0 0 1
$EndComp
$Comp
L GND #PWR01
U 1 1 4D4728FC
P 2850 1750
F 0 "#PWR01" H 2850 1750 30 0001 C CNN
F 1 "GND" H 2850 1680 30 0001 C CNN
1 2850 1750
1 0 0 -1
$EndComp
$Comp
L CONN_1 P3
U 1 1 4D472716
P 2250 4750
F 0 "P3" H 2330 4750 40 0000 L CNN
F 1 "CONN_1" H 2250 4805 30 0001 C CNN
F 2 "PAD_2mm" H 2250 4750 60 0001 C CNN
1 2250 4750
-1 0 0 1
$EndComp
$Comp
L CONN_1 P2
U 1 1 4D472714
P 2250 4550
F 0 "P2" H 2330 4550 40 0000 L CNN
F 1 "CONN_1" H 2250 4605 30 0001 C CNN
F 2 "PAD_2mm" H 2250 4550 60 0001 C CNN
1 2250 4550
-1 0 0 1
$EndComp
$Comp
L R R3
U 1 1 4D472610
P 3900 1550
F 0 "R3" V 3980 1550 50 0000 C CNN
F 1 "68" V 3900 1550 50 0000 C CNN
F 2 "0402" H 3900 1550 60 0001 C CNN
1 3900 1550
0 -1 -1 0
$EndComp
$Comp
L LED D1
U 1 1 4D47260E
P 3250 1550
F 0 "D1" H 3250 1650 50 0000 C CNN
F 1 "LTST-C190KRKT" H 3250 1450 50 0000 C CNN
F 2 "0603" H 3250 1550 60 0001 C CNN
1 3250 1550
-1 0 0 -1
$EndComp
Text Label 7550 5550 0 60 ~ 0
CLK
Text Label 7550 5150 0 60 ~ 0
nRESET
Text Label 7550 5750 0 60 ~ 0
SCK
Text Label 7550 5850 0 60 ~ 0
MISO
Text Label 7550 5250 0 60 ~ 0
MOSI
Text Label 5000 850 0 60 ~ 0
nRESET
Text Label 6500 5150 2 60 ~ 0
nRESET
$Comp
L C C1
U 1 1 4D470731
P 1850 3400
F 0 "C1" H 1900 3500 50 0000 L CNN
F 1 "100nF" H 1900 3300 50 0000 L CNN
F 2 "0402" H 1850 3400 60 0001 C CNN
1 1850 3400
1 0 0 -1
$EndComp
NoConn ~ 3100 3450
NoConn ~ 6500 2850
NoConn ~ 6500 3000
NoConn ~ 6500 3300
$Comp
L GND #PWR02
U 1 1 4D470651
P 6700 3150
F 0 "#PWR02" H 6700 3150 30 0001 C CNN
F 1 "GND" H 6700 3080 30 0001 C CNN
1 6700 3150
0 -1 -1 0
$EndComp
$Comp
L VDD #PWR03
U 1 1 4D470644
P 1850 2800
F 0 "#PWR03" H 1850 2900 30 0001 C CNN
F 1 "VDD" H 1850 2910 30 0000 C CNN
1 1850 2800
1 0 0 -1
$EndComp
$Comp
L VDD #PWR04
U 1 1 4D470639
P 6700 3450
F 0 "#PWR04" H 6700 3550 30 0001 C CNN
F 1 "VDD" H 6700 3560 30 0000 C CNN
1 6700 3450
0 1 1 0
$EndComp
$Comp
L VDD #PWR05
U 1 1 4D47062B
P 7250 4950
F 0 "#PWR05" H 7250 5050 30 0001 C CNN
F 1 "VDD" H 7250 5060 30 0000 C CNN
1 7250 4950
1 0 0 -1
$EndComp
$Comp
L GND #PWR06
U 1 1 4D470615
P 7250 6050
F 0 "#PWR06" H 7250 6050 30 0001 C CNN
F 1 "GND" H 7250 5980 30 0001 C CNN
1 7250 6050
1 0 0 -1
$EndComp
NoConn ~ 4800 4550
NoConn ~ 4650 4550
NoConn ~ 3100 2850
NoConn ~ 3100 2700
NoConn ~ 5250 1750
NoConn ~ 5100 1750
NoConn ~ 4950 1750
$Comp
L R R2
U 1 1 4D47052E
P 4050 1050
F 0 "R2" V 4130 1050 50 0000 C CNN
F 1 "100" V 4050 1050 50 0000 C CNN
F 2 "0402" H 4050 1050 60 0001 C CNN
1 4050 1050
0 -1 -1 0
$EndComp
$Comp
L R R1
U 1 1 4D47052C
P 4050 850
F 0 "R1" V 4130 850 50 0000 C CNN
F 1 "100" V 4050 850 50 0000 C CNN
F 2 "0402" H 4050 850 60 0001 C CNN
1 4050 850
0 -1 -1 0
$EndComp
$Comp
L GND #PWR07
U 1 1 4D4704FA
P 3500 1250
F 0 "#PWR07" H 3500 1250 30 0001 C CNN
F 1 "GND" H 3500 1180 30 0001 C CNN
1 3500 1250
1 0 0 -1
$EndComp
$Comp
L CONN_3 K1
U 1 1 4D4704D9
P 2950 950
F 0 "K1" V 2900 950 50 0000 C CNN
F 1 "3M 961103-5604-AR" H 2950 1200 50 0000 C CNN
F 2 "CONN_3" H 2950 950 60 0001 C CNN
F 4 "(or any similar 0.1 in header)" H 3050 1300 50 0000 C CNN "Field4"
1 2950 950
-1 0 0 1
$EndComp
$Comp
L GND #PWR08
U 1 1 4D4704BC
P 1850 4000
F 0 "#PWR08" H 1850 4000 30 0001 C CNN
F 1 "GND" H 1850 3930 30 0001 C CNN
1 1850 4000
1 0 0 -1
$EndComp
$Comp
L GND #PWR09
U 1 1 4D4704B4
P 5700 4750
F 0 "#PWR09" H 5700 4750 30 0001 C CNN
F 1 "GND" H 5700 4680 30 0001 C CNN
1 5700 4750
1 0 0 -1
$EndComp
$Comp
L ATMEGA48-MMU U1
U 1 1 4D4702FE
P 4800 3150
F 0 "U1" H 3450 4350 60 0000 C CNN
F 1 "ATMEGA48-MMU" H 4800 3150 60 0000 C CNN
F 2 "QFN28-Atmel" H 4800 3150 60 0001 C CNN
1 4800 3150
1 0 0 -1
$EndComp
$Comp
L 8:10-CARD P1
U 1 1 4D4702F7
P 8350 5450
F 0 "P1" H 8150 6000 60 0000 C CNN
F 1 "8:10-CARD" H 8400 4850 60 0000 C CNN
F 2 "8:10-card" H 8350 5450 60 0001 C CNN
1 8350 5450
1 0 0 -1
$EndComp
$EndSCHEMATC