ubb-vga: use a free-running counter instead of resetting it for each line

Two benefits:
1) We don't accumulate errors from the delay between the timer reset and
   the deadline preceding it
2) In the future, we may use WAIT to wait for timer expiration, which
   should cause less bus activity and is should also reduce jitter

- regs4740.h (TFR. TFSR, TFCR, TDHR): added more timer registers
- ubb-vga.c (until): renamed to "delay" and changed to measure relative
  to the last deadline
- ubb-vga.c (line, hdelay, frame): replaced "until" with "delay"
- ubb-vga.c (hdelay, frame, session): reset the timer only once, at
  the beginning of the session
- ubb-vga.c (frame): we didn't wait for the horizontal back porch of
  the last image line

ubb-vga/regs4740.h

@@ -50,8 +50,12 @@
 #define	TSCR	_TCU(0x3c)		/* Timer STOP clear */
 #define	TESR	_TCU(0x14)		/* Timer counter enable set */
 #define	TECR	_TCU(0x18)		/* Timer counter enable clear */
+#define	TFR	_TCU(0x20)		/* Timer flag */
+#define	TFSR	_TCU(0x24)		/* Timer flag set */
+#define	TFCR	_TCU(0x28)		/* Timer flag clear */
 #define	TCSR(n)	_TCU(0x4c+0x10*(n))	/* Timer control */
 #define	TDFR(n)	_TCU(0x40+0x10*(n))	/* Timer data full */
+#define	TDHR(n)	_TCU(0x44+0x10*(n))	/* Timer data half */
 #define	TCNT(n)	_TCU(0x48+0x10*(n))	/* Timer counter */
 
 #define	MSC_STRPCL	_MSC(0x00)	/* Start/stop MMC/SD clock */