diff --git a/ubb-vga/Makefile b/ubb-vga/Makefile
index 6a33f93..4afec2b 100644
--- a/ubb-vga/Makefile
+++ b/ubb-vga/Makefile
@@ -5,7 +5,7 @@ CFLAGS=-Wall -g -O9 -march=mips32
 LDFLAGS=-lm
 OBJS=ubb-vga.o grabfb.o tstimg.o ppm.o ppmimg.o ccube.o physmem.o
 
-.PHONY:		all asm sch clean spotless
+.PHONY:		all asm sch schp brd clean spotless
 
 all:		ubb-vga ubb-vga-old
 
@@ -17,6 +17,12 @@ asm:		ubb-vga.c
 sch:
 		eeschema `pwd`/ubb-vga.sch
 
+schp:
+		eeschema `pwd`/vga-ben.sch
+
+brd:
+		pcbnew `pwd`/vga-ben.brd
+
 clean:
 		rm -f $(OBJS)
 
diff --git a/ubb-vga/vga-ben.brd b/ubb-vga/vga-ben.brd
new file mode 100644
index 0000000..8eb7036
--- /dev/null
+++ b/ubb-vga/vga-ben.brd
@@ -0,0 +1,1416 @@
+PCBNEW-BOARD Version 1 date Wed May  4 12:46:08 2011
+
+# Created by Pcbnew(2010-12-27 BZR 2685)-unstable
+
+$GENERAL
+LayerCount 2
+Ly 1FFF8001
+EnabledLayers 13E88001
+Links 29
+NoConn 0
+Di 62651 34846 75629 39957
+Ndraw 42
+Ntrack 91
+Nzone 0
+BoardThickness 630
+Nmodule 23
+Nnets 11
+$EndGENERAL
+
+$SHEETDESCR
+Sheet A4 11700 8267
+Title ""
+Date "4 may 2011"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndSHEETDESCR
+
+$SETUP
+InternalUnit 0.000100 INCH
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+Layers 2
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+EdgeModWidth 150
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+PadSize 786 196
+PadDrill 0
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+AuxiliaryAxisOrg 0 0
+$EndSETUP
+
+$EQUIPOT
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+$EndEQUIPOT
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+$EndPAD
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+$EndPAD
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+$EndPAD
+$EndMODULE  8:10-card
+$MODULE PAD_2mm
+Po 67421 38386 0 0 4D4ADC05 4DC0FEF3 ~~
+Li PAD_2mm
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+AR /4DC0FD51
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+T1 0 -150 200 200 0 40 M I 20 N"CONN_1"
+$PAD
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+Dr 0 0 0
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+Po 67421 37894 0 0 4D4ADC05 4DC0FEF5 ~~
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+$PAD
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+$EndPAD
+$EndMODULE  PAD_2mm
+$MODULE PAD_2mm
+Po 67421 37402 0 0 4D4ADC05 4DC0FEF7 ~~
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+$MODULE PAD_2mm
+Po 67421 36909 0 0 4D4ADC05 4DC0FEF9 ~~
+Li PAD_2mm
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+Op 0 0 0
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+$PAD
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+Ne 10 "GND"
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+$EndMODULE  PAD_2mm
+$MODULE PAD_2mm
+Po 67421 36417 0 0 4D4ADC05 4DC0FEFB ~~
+Li PAD_2mm
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+AR /4DC0FD3E
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+$PAD
+Sh "1" O 786 196 0 0 0
+Dr 0 0 0
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+$EndMODULE  PAD_2mm
+$MODULE PAD_2mm
+Po 67421 37402 0 15 4D4ADC05 4DC0FEFD ~~
+Li PAD_2mm
+Sc 4DC0FEFD
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+Op 0 0 0
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+$PAD
+Sh "1" O 786 196 0 0 0
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+$EndPAD
+$EndMODULE  PAD_2mm
+$MODULE PAD_2mm
+Po 67421 38386 0 15 4D4ADC05 4DC0FEFF ~~
+Li PAD_2mm
+Sc 4DC0FEFF
+AR /4DC0FCC0
+Op 0 0 0
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+T1 0 150 200 200 0 40 N I 25 N"CONN_1"
+$PAD
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+Dr 0 0 0
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+Ne 2 "/BLUE"
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+$EndPAD
+$EndMODULE  PAD_2mm
+$MODULE PAD_2mm
+Po 67421 37894 0 15 4D4ADC05 4DC0FF01 ~~
+Li PAD_2mm
+Sc 4DC0FF01
+AR /4DC0FCBA
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+$PAD
+Sh "1" O 786 196 0 0 0
+Dr 0 0 0
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+Ne 4 "/GREEN"
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+$EndPAD
+$EndMODULE  PAD_2mm
+$MODULE PAD_2mm
+Po 67421 36417 0 15 4D4ADC05 4DC0FF03 ~~
+Li PAD_2mm
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+Op 0 0 0
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+$MODULE PAD_2mm
+Po 67421 36909 0 15 4D4ADC05 4DC0FF05 ~~
+Li PAD_2mm
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+AR /4DC0FCC9
+Op 0 0 0
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+Sh "1" O 786 196 0 0 0
+Dr 0 0 0
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+Ne 5 "/HSYNC"
+Po 0 0
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+$MODULE PAD_120x60
+Po 67028 39075 0 15 4D4ADC05 4DC10FD8 ~~
+Li PAD_120x60
+Sc 4DC10FD8
+AR /4DC0FDDD
+Op 0 0 0
+At SMD 
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+T1 0 150 200 200 0 40 N I 25 N"CONN_1"
+$PAD
+Sh "1" O 1200 600 0 0 0
+Dr 0 0 0
+At SMD N 00808000
+Ne 10 "GND"
+Po 0 0
+$EndPAD
+$EndMODULE  PAD_120x60
+$MODULE PAD_120x60
+Po 67028 35728 0 15 4D4ADC05 4DC10FDA ~~
+Li PAD_120x60
+Sc 4DC10FDA
+AR /4DC0FDD2
+Op 0 0 0
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+T1 0 150 200 200 0 40 N I 25 N"CONN_1"
+$PAD
+Sh "1" O 1200 600 0 0 0
+Dr 0 0 0
+At SMD N 00808000
+Ne 10 "GND"
+Po 0 0
+$EndPAD
+$EndMODULE  PAD_120x60
+$TEXTPCB
+Te "CC-BY-SA"
+Po 71654 38484 394 394 79 0
+De 21 1 0 Normal
+$EndTEXTPCB
+$TEXTPCB
+Te "qi-hw.com"
+Po 71654 37697 394 394 79 0
+De 21 1 0 Normal
+$EndTEXTPCB
+$TEXTPCB
+Te "VGA-BEN"
+Po 71457 36811 394 394 79 0
+De 21 1 0 Normal
+$EndTEXTPCB
+$DRAWSEGMENT
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+$TEXTPCB
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+De 21 1 0 Normal
+$EndTEXTPCB
+$TEXTPCB
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+De 21 1 0 Normal
+$EndTEXTPCB
+$TEXTPCB
+Te "H"
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+$EndTEXTPCB
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+$EndDRAWSEGMENT
+$TEXTPCB
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+Po 66634 36417 354 354 71 0
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+$EndTEXTPCB
+$TEXTPCB
+Te "110504"
+Po 70768 35827 354 354 71 0
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+$EndTEXTPCB
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+$ZONE
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+ZLayer 0
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diff --git a/ubb-vga/vga-ben.cmp b/ubb-vga/vga-ben.cmp
new file mode 100644
index 0000000..ce5903b
--- /dev/null
+++ b/ubb-vga/vga-ben.cmp
@@ -0,0 +1,164 @@
+Cmp-Mod V01 Created by CvPCB (2010-12-27 BZR 2685)-unstable date = Wed May  4 05:35:31 2011
+
+BeginCmp
+TimeStamp = /4DB3AF38;
+Reference = P1;
+ValeurCmp = UBB;
+IdModule  = 8:10-card;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FCC9;
+Reference = P2;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FCA7;
+Reference = P3;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FCBA;
+Reference = P4;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FCC0;
+Reference = P5;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FCD9;
+Reference = P6;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FD3E;
+Reference = P7;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FD45;
+Reference = P8;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FD49;
+Reference = P9;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FD4D;
+Reference = P10;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FD51;
+Reference = P11;
+ValeurCmp = CONN_1;
+IdModule  = PAD_2mm;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FDD2;
+Reference = P12;
+ValeurCmp = CONN_1;
+IdModule  = PAD_120x60;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DC0FDDD;
+Reference = P13;
+ValeurCmp = CONN_1;
+IdModule  = PAD_120x60;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB5D0DD;
+Reference = R1;
+ValeurCmp = 1k;
+IdModule  = 0402;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB5D0DE;
+Reference = R2;
+ValeurCmp = 1k;
+IdModule  = 0402;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB5D0E0;
+Reference = R3;
+ValeurCmp = 1k;
+IdModule  = 0402;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB5D1BA;
+Reference = R4;
+ValeurCmp = 330;
+IdModule  = 0402;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB3AF49;
+Reference = R5;
+ValeurCmp = 470;
+IdModule  = 0402;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB3AF4B;
+Reference = R6;
+ValeurCmp = 470;
+IdModule  = 0402;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB3AF4D;
+Reference = R7;
+ValeurCmp = 470;
+IdModule  = 0402;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB5D125;
+Reference = R8;
+ValeurCmp = 82;
+IdModule  = 0402;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB5D129;
+Reference = R9;
+ValeurCmp = 82;
+IdModule  = 0402;
+EndCmp
+
+BeginCmp
+TimeStamp = /4DB5D12B;
+Reference = R10;
+ValeurCmp = 82;
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diff --git a/ubb-vga/vga-ben.pro b/ubb-vga/vga-ben.pro
new file mode 100644
index 0000000..4704ff0
--- /dev/null
+++ b/ubb-vga/vga-ben.pro
@@ -0,0 +1,69 @@
+update=Wed May  4 12:46:08 2011
+last_client=pcbnew
+[eeschema]
+version=1
+LibDir=
+NetFmt=1
+HPGLSpd=20
+HPGLDm=15
+HPGLNum=1
+offX_A4=0
+offY_A4=0
+offX_A3=0
+offY_A3=0
+offX_A2=0
+offY_A2=0
+offX_A1=0
+offY_A1=0
+offX_A0=0
+offY_A0=0
+offX_A=0
+offY_A=0
+offX_B=0
+offY_B=0
+offX_C=0
+offY_C=0
+offX_D=0
+offY_D=0
+offX_E=0
+offY_E=0
+RptD_X=0
+RptD_Y=100
+RptLab=1
+LabSize=60
+PrintMonochrome=1
+ShowSheetReferenceAndTitleBlock=1
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=../../kicad-libs/components/8_10-card
+LibName4=../../kicad-libs/components/vga
+LibName5=conn
+[cvpcb]
+version=1
+NetIExt=net
+[cvpcb/libraries]
+EquName1=devcms
+[pcbnew]
+version=1
+PadDrlX=0
+PadDimH=786
+PadDimV=196
+BoardThickness=630
+SgPcb45=1
+TxtPcbV=394
+TxtPcbH=394
+TxtModV=600
+TxtModH=600
+TxtModW=120
+VEgarde=100
+DrawLar=50
+EdgeLar=50
+TxtLar=79
+MSegLar=150
+LastNetListRead=vga-ben.net
+[pcbnew/libraries]
+LibDir=
+LibName1=../../kicad-libs/modules/8_10-card
+LibName2=../../kicad-libs/modules/pads
+LibName3=../../kicad-libs/modules/stdpass
diff --git a/ubb-vga/vga-ben.sch b/ubb-vga/vga-ben.sch
new file mode 100644
index 0000000..538b04d
--- /dev/null
+++ b/ubb-vga/vga-ben.sch
@@ -0,0 +1,441 @@
+EESchema Schematic File Version 2  date Wed May  4 12:29:47 2011
+LIBS:power
+LIBS:device
+LIBS:8_10-card
+LIBS:vga
+LIBS:conn
+EELAYER 24  0
+EELAYER END
+$Descr A4 11700 8267
+Sheet 1 1
+Title "Ben VGA Adapter"
+Date "4 may 2011"
+Rev "20110504"
+Comp "Werner Almesberger"
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
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