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libubb/include/ubb/regs4740.h: add symbolic bit/field definitions for MSC_*

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This commit is contained in:
Werner Almesberger 2013-01-20 17:33:13 -03:00
parent a31351545c
commit 8509c1f7b9
1 changed files with 79 additions and 0 deletions
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79
libubb/include/ubb/regs4740.h
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@ -45,19 +45,98 @@
#define TDHR(n) _TCU(0x44+0x10*(n)) /* Timer data half */
#define TCNT(n) _TCU(0x48+0x10*(n)) /* Timer counter */
/* MSC */
#define MSC_STRPCL _MSC(0x00) /* Start/stop MMC/SD clock */
#define MSC_STRPCRL_EXIT_MULTIPLE (1 << 7)
#define MSC_STRPCRL_EXIT_TRANSFER (1 << 6)
#define MSC_STRPCRL_START_READWAIT (1 << 5)
#define MSC_STRPCRL_STOP_READWAIT (1 << 4)
#define MSC_STRPCRL_RESET (1 << 3)
#define MSC_STRPCRL_START_OP (1 << 2)
#define MSC_STRPCRL_START_CLOCK (1 << 1)
#define MSC_STRPCRL_STOP_CLOCK (1 << 0)
#define MSC_STAT _MSC(0x04) /* MSC status */
#define MSC_STAT_IS_RESETTING (1 << 15)
#define MSC_STAT_SDIO_INT_ACTIVE (1 << 14)
#define MSC_STAT_PRG_DONE (1 << 13)
#define MSC_STAT_DATA_TRAN_DONE (1 << 12)
#define MSC_STAT_END_CMD_RES (1 << 11)
#define MSC_STAT_DATA_FIFO_AFULL (1 << 10) /* almost full */
#define MSC_STAT_IS_READWAIT (1 << 9)
#define MSC_STAT_CLK_EN (1 << 8)
#define MSC_STAT_DATA_FIFO_FULL (1 << 7)
#define MSC_STAT_DATA_FIFO_EMPTY (1 << 6)
#define MSC_STAT_CRC_RES_ERR (1 << 5)
#define MSC_STAT_CRC_READ_ERROR (1 << 4)
#define MSC_STAT_CRC_WRITE_ERROR_MASK (3 << MSC_STAT_CRC_WRITE_ERROR_SHIFT)
#define MSC_STAT_CRC_WRITE_ERROR_SHIFT 2
#define MSC_STAT_CRC_WRITE_ERROR_ERROR 1 /* error reported */
#define MSC_STAT_CRC_WRITE_ERROR_NOSTAT 2 /* no CRC status */
#define MSC_STAT_TIME_OUT_RES (1 << 1)
#define MSC_STAT_TIME_OUT_READ (1 << 0)
#define MSC_CLKRT _MSC(0x08) /* MSC clock rate */
#define MSC_CLKRT_MASK 7
#define MSC_CMDAT _MSC(0x0c) /* MMC/SD command and data control */
#define MSC_CMDAT_IO_ABORT (1 << 11)
#define MSC_CMDAT_BUS_WIDTH_MASK (3 << MSC_CMDAT_BUS_WIDTH_SHIFT)
#define MSC_CMDAT_BUS_WIDTH_SHIFT 9
#define MSC_CMDAT_BUS_WIDTH_1 0
#define MSC_CMDAT_BUS_WIDTH_4 2
#define MSC_CMDAT_DMA_EN (1 << 8)
#define MSC_CMDAT_INIT (1 << 7)
#define MSC_CMDAT_BUSY (1 << 6)
#define MSC_CMDAT_STREAM_BLOCK (1 << 5)
#define MSC_CMDAT_WRITE_READ (1 << 4)
#define MSC_CMDAT_DATA_EN (1 << 3)
#define MSC_CMDAT_RESPONSE_FORMAT_MASK (7 << MSC_CMDAT_RESPONSE_FORMAT_SHIFT)
#define MSC_CMDAT_RESPONSE_FORMAT_SHIFT 0
#define MSC_CMDAT_RESPONSE_FORMAT_NONE 0
#define MSC_CMDAT_RESPONSE_FORMAT_R1 1 /* or R1b */
#define MSC_CMDAT_RESPONSE_FORMAT_R2 2
#define MSC_CMDAT_RESPONSE_FORMAT_R3 3
#define MSC_CMDAT_RESPONSE_FORMAT_R4 4
#define MSC_CMDAT_RESPONSE_FORMAT_R5 5
#define MSC_CMDAT_RESPONSE_FORMAT_R6 6
#define MSC_RESTO _MSC(0x10) /* MMC/SD response time out */
#define MSC_RESTO_MASK 0xff /* in MSC_CLK */
#define MSC_RDTO _MSC(0x14) /* MMC/SD read time out */
#define MSC_RDTO_MASK 0xffff /* in CLK_SRC/256 */
#define MSC_BLKLEN _MSC(0x18) /* MMC/SD block length */
#define MSC_BLKLEN_MASK 0xfff
#define MSC_NOB _MSC(0x1c) /* MMC/SD number of blocks */
#define MSC_NOB_MASK 0xffff
#define MSC_SNOB _MSC(0x20) /* MMC/SD successful blocks */
#define MSC_SNOB_MASK 0xffff
#define MSC_IMASK _MSC(0x24) /* MMC/SD interrupt mask */
#define MSC_INT_SDIO (1 << 7)
#define MSC_INT_TXFIFO_WR_REQ (1 << 6)
#define MSC_INT_RXFIFO_RD_REQ (1 << 5)
#define MSC_INT_END_CMD_RES (1 << 2)
#define MSC_INT_PRG_DONE (1 << 1)
#define MSC_INT_DATA_TRAN_DONE (1 << 0)
#define MSC_IREG _MSC(0x28) /* MMC/SD interrupt */
#define MSC_CMD _MSC(0x2c) /* MMC/SD command index */
#define MSC_CMD_MASK 0x3f
#define MSC_ARG _MSC(0x30) /* MMC/SD command argument */
#define MSC_RES _MSC(0x34) /* MMC?SD response FIFO */
#define MSC_RXFIFO_MASK 0xffff /* 8 x 16 bits */
#define MSC_RXFIFO _MSC(0x38) /* MMC/SD receive data FIFO */
#define MSC_TXFIFO _MSC(0x3c) /* MMC/SD transmit data FIFO */
#define _DMAn(n, r) _DMAC(0x20*(n)+(r))