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mirror of git://projects.qi-hardware.com/ben-blinkenlights.git synced 2024-11-27 17:05:20 +02:00

ubb-vga.c: housekeeping

- ubb-vga.c (ben_setup): use REG_WINDOW instead of calculating the
  window size
- ubb-vga.c (PAGE_SIZS): we no longer need it - removed
- ubb-vga.c (line): shift bus width setting in MSC_CMDAT by the field
  position, not the bit position
- ubb-vga.c (line): moved comment detailing the search for the
  adjustment value to the mode database, so that we don't clutter
  this function
This commit is contained in:
Werner Almesberger 2011-04-29 22:22:51 -03:00
parent 1a7b5015f1
commit 8d803dda4c

View File

@ -69,9 +69,6 @@ static int bad;
#define TIMER 7 #define TIMER 7
#define PAGE_SIZE 4096
static uint32_t old_icmr; static uint32_t old_icmr;
static uint32_t old_clkgr; static uint32_t old_clkgr;
@ -152,7 +149,7 @@ void *map(off_t addr, size_t size)
static void ben_setup(void) static void ben_setup(void)
{ {
base = map(SOC_BASE, PAGE_SIZE*3*16); base = map(SOC_BASE, REG_WINDOW);
/* /*
* Ironically, switching the LCD clock on and off many times only * Ironically, switching the LCD clock on and off many times only
@ -205,6 +202,29 @@ static const struct mode {
{ NULL } { NULL }
}, *mode = mode_db; }, *mode = mode_db;
/*
* Adjustment value tests with the XEN-1510 (640x480):
*
* Adjustment Tries Good Jam FIFO jitter
* Quick load
* -0.0 10 3 7 0 n
* -0.1 10 5 5 0 n
* -0.2 10 6 4 0 n
* -0.3 10 7 3 0 n
* 10 5 5 0 y
* -0.4 10 1 0 9 n
* 10 5 0 5 n repeat
* 10 5 0 5 y
* -0.5 10 3 0 7 n
* 10 7 0 3 y
* -1.0 5 0 5 0
*
* Good = image is stable
* Jam = does not detect the signal properly, loss of HSYNC, artefacts,
* or no image at all
* FIFO jitter = some lines get shifted by a "digital" amount
*/
void setup(void) void setup(void)
{ {
@ -244,7 +264,7 @@ static void line(const uint32_t *line)
MSC_RESTO = 0xffff; MSC_RESTO = 0xffff;
MSC_CMDAT = MSC_CMDAT =
(1 << 10) | /* 4 bit bus */ (2 << 9) | /* 4 bit bus */
(1 << 4) | /* write */ (1 << 4) | /* write */
(1 << 3) | /* with data transfer */ (1 << 3) | /* with data transfer */
1; /* R1 response */ 1; /* R1 response */
@ -252,28 +272,6 @@ static void line(const uint32_t *line)
MSC_STRPCL = 4; /* START_OP */ MSC_STRPCL = 4; /* START_OP */
until(mode->hsync_end); until(mode->hsync_end);
/*
* Adjustment value tests with the XEN-1510:
*
* Adjustment Tries Good Jam FIFO jitter
* Quick load
* -0.0 10 3 7 0 n
* -0.1 10 5 5 0 n
* -0.2 10 6 4 0 n
* -0.3 10 7 3 0 n
* 10 5 5 0 y
* -0.4 10 1 0 9 n
* 10 5 0 5 n repeat
* 10 5 0 5 y
* -0.5 10 3 0 7 n
* 10 7 0 3 y
* -1.0 5 0 5 0
*
* Good = image is stable
* Jam = does not detect the signal properly, loss of HSYNC, artefacts,
* or no image at all
* FIFO jitter = some lines get shifted by a "digital" amount
*/
/* Front porch */ /* Front porch */