diff --git a/ubb-vga/ubb-vga.c b/ubb-vga/ubb-vga.c
index 1d271d9..0a5b7e2 100644
--- a/ubb-vga/ubb-vga.c
+++ b/ubb-vga/ubb-vga.c
@@ -51,41 +51,56 @@ static int bad;
 static const struct mode mode_db[] = {
 /* name		xres yres clkdiv vfront  hsync     hback     htotal	*/
 /*			      vsync  vback				*/
-{ "640x480",	 640, 480, 11, 2, 32, 14, US(3.47), US(0.79), US(29.7) },
-{ "800x600",	 800, 600,  8, 2, 32, 14, US(4.81), US(0.79), US(28.7) },
-/* the next one may work after adjusting the timing in "frame" */
-{ "800x600",	 800, 600,  8, 2, 32, 14, US(4.51), US(0.79), US(28.2) },
+{ "640x480/58",	 640, 480, 12, 2, 10, 33, US(3.81), US(1.91), US(32.5) },
+{ "640x480/70",	 640, 480,  9, 2,  8, 29, US(1.90), US(2.06), US(27.5) },
+
+{ "800x600/54",	 800, 600,  8, 2, 32, 14, US(4.81), US(0.79), US(28.7) },
+{ "800x600/56",	 800, 600,  8, 2,  1, 22, US(2.00), US(3.56), US(28.5) },
+{ "800x600/72",	 800, 600,  5, 3,  1, 27, US(2.14), US(2.70), US(22.0) },
 
 /* the 1024x768 below is not great but has good parameter tolerance */
 { "1024x768",	1024, 768,  8, 2, 32, 14, US(4.51), US(0.79), US(36.0) },
-/* illustrate underruns */
+/* illustrate underruns (without DMA) */
 { "1024x768ur",	1024, 768,  7, 2, 32, 14, US(2.21), US(0.79), US(33.5) },
 { "1024x768/53",1024, 768,  5, 2, 32, 14, US(1.31), US(0.79), US(23.1) },
+{ "1024x768/50",1024, 768,  5, 6,  3, 29, US(2.10), US(2.46), US(24.5) },
 { NULL }
 };
 
-	/*
-	 * Adjustment value tests with the XEN-1510 (640x480):
-	 *
-	 * Adjustment	Tries	Good	Jam	FIFO jitter
-	 *						Quick load
-	 * -0.0		10	3	7	0	n
-	 * -0.1		10	5	5	0	n
-	 * -0.2		10	6	4	0	n
-	 * -0.3		10	7	3	0	n
-	 *		10	5	5	0	y
-	 * -0.4		10	1	0	9	n
-	 * 		10	5	0	5	n	repeat
-	 *		10	5	0	5	y
-	 * -0.5		10	3	0	7	n
-	 * 		10	7	0	3	y
-	 * -1.0		 5	0	5	0
-	 *
-	 * Good = image is stable
-	 * Jam = does not detect the signal properly, loss of HSYNC, artefacts,
-	 *       or no image at all
-	 * FIFO jitter = some lines get shifted by a "digital" amount
-	 */
+/*
+ * 640x480/58: http://tinyvga.com/vga-timing/640x480@60Hz
+ *
+ * H: 3.81+0.64+25.42+1.91 us = 31.78 us
+ *
+ * Pixel clock is 25.175 MHz. We have 25.85 MHz, thus:
+ * 25.42/25.75*25.175 = 24.85
+ *
+ * htotal should be 31.77+(24.85-25.175) = 31.445, but we actually need more.
+ * Seems that our hfront is about 1.7 us.
+ *
+ * Observation: bad FIFO jitter.
+ *
+ *
+ * 640x480/70: http://tinyvga.com/vga-timing/640x480@73Hz
+ *
+ * That's a pretty ugly adaptation. The DMA really seems to dislike the 73 Hz
+ * parameters.
+ * 
+ *
+ * 800x600/54: just a lucky combination
+ *
+ *
+ * 800x600/56: http://tinyvga.com/vga-timing/800x600@56Hz
+ *
+ * Note that we have the sync pulses upside-down.
+ *
+ *
+ * 800x600/7: yet another lucky combination
+ *
+ *
+ * 1024x768/50: loosely based on http://tinyvga.com/vga-timing/1024x768@60Hz
+ */
+
 
 const struct mode *mode = mode_db;