qi-hardware/ben-blinkenlights
1
0
Fork 0
mirror of git://projects.qi-hardware.com/ben-blinkenlights.git synced 2024-11-23 19:47:30 +02:00
Code

ubb-la/ubb-la.c: raise MMC bus clock to 84 MHz during overhead

Browse Source 
We also de-optimize the start bit (DAT0=0) phase for now. In the
12 MHz scenario, this produces the following results:

1       3       gap+0   2       0       1       3
------- ------- ------- ------- ------- ------- -------
8               38              26      100     146
        102     38      26                      6
        52      39      26                      55
        147     41      26                      105
97              39              26      10      146

Note that the gap now includes the start bit phase, since the clock
change may complicate the calculation of how many 12 MHz samples
it corresponds to.
This commit is contained in:
Werner Almesberger 2013-01-28 23:19:52 -03:00
parent 128590bee0
commit bf62b209e5
1 changed files with 17 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
ubb-la/ubb-la.c
View File

@ -167,7 +167,8 @@ quit:
} }
static void xfers(unsigned long *bufs, int n_bufs, int nibbles) static void xfers(unsigned long *bufs, int n_bufs, int nibbles,
const struct mmcclk *clk, const struct mmcclk *fast_clk)
{ {
int i = 0; int i = 0;
@ -194,18 +195,24 @@ static void xfers(unsigned long *bufs, int n_bufs, int nibbles)
MSC_STRPCL = MSC_STRPCRL_START_OP; MSC_STRPCL = MSC_STRPCRL_START_OP;
MSC_CLKRT = fast_clk->clkrt;
MSCCDR = 0;
/* /*
* Experimental value for 12 MSa/s: hangs always/usually with * Experimental value for 12 MSa/s: hangs always/usually with
* 231 cycles, hangs sometimes with 232, hands never (so far) * 231 cycles, hangs sometimes with 232, hands never (so far)
* with 233. * with 233.
*/ */
for (j = 0; j != 233; j++) asm volatile (""); // for (j = 0; j != 233; j++) asm volatile ("");
// while (MSC_STAT & MSC_STAT_DATA_FIFO_EMPTY); // while (MSC_STAT & MSC_STAT_DATA_FIFO_EMPTY);
// while (!(MSC_STAT & MSC_STAT_END_CMD_RES)); while (!(MSC_STAT & MSC_STAT_END_CMD_RES));
IN(UBB_CMD); IN(UBB_CMD);
MSCCDR = clk->clkdiv;
MSC_CLKRT = clk->clkrt;
DCS(DMA) = DCS(DMA) =
DCS_NDES | /* no descriptor */ DCS_NDES | /* no descriptor */
DCS_CTE; /* enable channel */ DCS_CTE; /* enable channel */
@ -291,7 +298,8 @@ static int do_buf(int nibbles, uint32_t trigger, uint32_t mask)
} }
static void do_bufs(int n_bufs, int nibbles) static void do_bufs(int n_bufs, int nibbles,
const struct mmcclk *clk, const struct mmcclk *fast_clk)
{ {
uint8_t *bufs[n_bufs]; uint8_t *bufs[n_bufs];
struct physmem_vec vecs[n_bufs]; struct physmem_vec vecs[n_bufs];
@ -316,7 +324,8 @@ static void do_bufs(int n_bufs, int nibbles)
} }
addrs[i] = vecs[i].addr; addrs[i] = vecs[i].addr;
} }
xfers(addrs, n_bufs, nibbles); assert(!fast_clk->clkdiv);
xfers(addrs, n_bufs, nibbles, clk, fast_clk);
for (i = 0; i != n_bufs; i++) for (i = 0; i != n_bufs; i++)
print_samples(stdout, bufs[i], 0, nibbles); print_samples(stdout, bufs[i], 0, nibbles);
@ -382,7 +391,7 @@ int main(int argc, char **argv)
unsigned long trigger = 1, mask = 0; unsigned long trigger = 1, mask = 0;
unsigned long multi = 0; unsigned long multi = 0;
int clkout = 0; int clkout = 0;
struct mmcclk clk; struct mmcclk clk, fast_clk;
char *end; char *end;
int c, res; int c, res;
@ -442,7 +451,8 @@ int main(int argc, char **argv)
if (!multi) { if (!multi) {
res = !do_buf(8128, trigger, mask); res = !do_buf(8128, trigger, mask);
} else { } else {
do_bufs(multi, 8128); frequency(&fast_clk, 84e6, 1);
do_bufs(multi, 8128, &clk, &fast_clk);
res = 0; res = 0;
} }