1
0
mirror of git://projects.qi-hardware.com/ben-blinkenlights.git synced 2024-12-24 05:44:36 +02:00

Initial commit.

This commit is contained in:
Werner Almesberger 2010-09-01 04:02:24 -03:00
commit ceca128fbf
9 changed files with 1260 additions and 0 deletions

15
Makefile Normal file
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.PHONY: all gen generate sch brd
all:
@echo "make what ? target: gen sch brd xpdf"
@exit 1
gen generate:
eeschema --plot `pwd`/bbl.sch
# need scripts
sch:
eeschema `pwd`/bbl.sch
brd:
pcbnew `pwd`/bbl.brd

635
bbl.brd Normal file
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PCBNEW-BOARD Version 1 date Wed Sep 1 01:13:04 2010
# Created by Pcbnew(2010-08-11 BZR 2448)-unstable
$GENERAL
LayerCount 2
Ly 1FFF8001
EnabledLayers 1FFF8001
Links 21
NoConn 0
Di 40579 19422 48514 25578
Ndraw 17
Ntrack 31
Nzone 0
BoardThickness 630
Nmodule 12
Nnets 8
$EndGENERAL
$SHEETDESCR
Sheet A4 11700 8267
Title "Ben Blinkenlights"
Date "1 sep 2010"
Rev "100831"
Comp "Werner Almesberger"
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndSHEETDESCR
$SETUP
InternalUnit 0.000100 INCH
ZoneGridSize 250
Layers 2
Layer[0] Back signal
Layer[15] Front signal
TrackWidth 100
TrackClearence 78
ZoneClearence 200
TrackMinWidth 80
DrawSegmWidth 150
EdgeSegmWidth 40
ViaSize 350
ViaDrill 250
ViaMinSize 350
ViaMinDrill 200
MicroViaSize 200
MicroViaDrill 50
MicroViasAllowed 0
MicroViaMinSize 200
MicroViaMinDrill 50
TextPcbWidth 120
TextPcbSize 600 800
EdgeModWidth 150
TextModSize 600 600
TextModWidth 120
PadSize 600 600
PadDrill 320
Pad2MaskClearance 100
AuxiliaryAxisOrg 0 0
$EndSETUP
$EQUIPOT
Na 0 ""
St ~
$EndEQUIPOT
$EQUIPOT
Na 1 "/CLK"
St ~
$EndEQUIPOT
$EQUIPOT
Na 2 "/CMD"
St ~
$EndEQUIPOT
$EQUIPOT
Na 3 "/DAT0"
St ~
$EndEQUIPOT
$EQUIPOT
Na 4 "/DAT1"
St ~
$EndEQUIPOT
$EQUIPOT
Na 5 "/DAT2"
St ~
$EndEQUIPOT
$EQUIPOT
Na 6 "/DAT3/CD"
St ~
$EndEQUIPOT
$EQUIPOT
Na 7 "N-000001"
St ~
$EndEQUIPOT
$NCLASS
Name "Default"
Desc "This is the default net class."
Clearance 78
TrackWidth 100
ViaDia 350
ViaDrill 250
uViaDia 200
uViaDrill 50
AddNet ""
AddNet "/CLK"
AddNet "/CMD"
AddNet "/DAT0"
AddNet "/DAT1"
AddNet "/DAT2"
AddNet "/DAT3/CD"
AddNet "N-000001"
$EndNCLASS
$MODULE 0603
Po 41250 20000 0 15 4C63FA2D 4C7D7F98 ~~
Li 0603
Sc 4C7D7F98
AR /4C7DA295
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"D1"
T1 0 150 200 200 0 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 5 "/DAT2"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 20500 1800 15 4C63FA2D 4C7D7F9A ~~
Li 0603
Sc 4C7D7F9A
AR /4C7DA297
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"D2"
T1 0 150 200 200 1800 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 5 "/DAT2"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 25000 0 15 4C63FA2D 4C7D7F9C ~~
Li 0603
Sc 4C7D7F9C
AR /4C7D7F04
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"R1"
T1 0 150 200 200 0 40 N I 25 N"47"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 4 "/DAT1"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 23000 0 15 4C63FA2D 4C7D7F9E ~~
Li 0603
Sc 4C7D7F9E
AR /4C7D7F35
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"D7"
T1 0 150 200 200 0 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "/CLK"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 22500 1800 15 4C63FA2D 4C7D7FA0 ~~
Li 0603
Sc 4C7D7FA0
AR /4C7D7F37
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"D6"
T1 0 150 200 200 1800 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 2 "/CMD"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 22000 0 15 4C63FA2D 4C7D7FA2 ~~
Li 0603
Sc 4C7D7FA2
AR /4C7D7F38
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"D5"
T1 0 150 200 200 0 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "/CMD"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 21500 1800 15 4C63FA2D 4C7D7FA4 ~~
Li 0603
Sc 4C7D7FA4
AR /4C7D7F39
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"D4"
T1 0 150 200 200 1800 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 6 "/DAT3/CD"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 21000 0 15 4C63FA2D 4C7D7FA6 ~~
Li 0603
Sc 4C7D7FA6
AR /4C7D7F3A
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"D3"
T1 0 150 200 200 0 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 6 "/DAT3/CD"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 23500 1800 15 4C63FA2D 4C7D7FA8 ~~
Li 0603
Sc 4C7D7FA8
AR /4C7D7F34
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"D8"
T1 0 150 200 200 1800 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 1 "/CLK"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 24000 0 15 4C63FA2D 4C7DA6C7 ~~
Li 0603
Sc 4C7DA6C7
AR /4C7D7EBC
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"D9"
T1 0 150 200 200 0 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 3 "/DAT0"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE 0603
Po 41250 24500 1800 15 4C63FA2D 4C7DA6C9 ~~
Li 0603
Sc 4C7DA6C9
AR /4C7D7EC0
Op 0 0 0
At SMD
T0 0 -150 200 200 1800 40 N V 25 N"D10"
T1 0 150 200 200 1800 40 N I 25 N"LED"
DS -443 227 -443 -227 50 21
DS -443 -227 443 -227 50 21
DS 443 -227 443 227 50 21
DS 443 227 -443 227 50 21
$PAD
Sh "1" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 3 "/DAT0"
Po -294 0
$EndPAD
$PAD
Sh "2" R 197 354 0 0 1800
Dr 0 0 0
At SMD N 00888000
Ne 7 "N-000001"
Po 294 0
$EndPAD
$EndMODULE 0603
$MODULE uSD-Card
Po 42500 22750 0 15 4C7DD099 4C7DD0D6 ~~
Li uSD-Card
Sc 4C7DD0D6
AR /4C7DA28C
Op 0 0 0
At SMD
T0 0 -150 200 200 0 40 N V 25 N"P1"
T1 0 150 200 200 0 40 N I 25 N"CONN_8"
DS 0 2165 0 -2165 30 21
DS 0 -2165 2007 -2165 30 21
DS 2007 -2165 2322 -1850 30 21
DS 2322 -1850 2795 -1850 30 21
DS 2795 -1850 2795 -2165 30 21
DS 2795 -2165 3346 -2165 30 21
DS 3346 -2165 3897 -1614 30 21
DS 0 2165 5905 2165 30 21
DS 3897 -1614 5905 -1614 30 21
DS 5905 2165 5905 -1614 30 21
DS -551 2165 -551 -2165 30 21
$PAD
Sh "1" R 1181 355 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 5 "/DAT2"
Po 4920 -1239
$EndPAD
$PAD
Sh "2" R 1181 355 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 6 "/DAT3/CD"
Po 4920 -806
$EndPAD
$PAD
Sh "3" R 1181 355 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 2 "/CMD"
Po 4920 -373
$EndPAD
$PAD
Sh "4" R 1299 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 4979 59
$EndPAD
$PAD
Sh "5" R 1181 355 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 1 "/CLK"
Po 4920 491
$EndPAD
$PAD
Sh "6" R 1299 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 0 ""
Po 4979 925
$EndPAD
$PAD
Sh "7" R 1181 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 3 "/DAT0"
Po 4920 1358
$EndPAD
$PAD
Sh "8" R 1181 354 0 0 0
Dr 0 0 0
At SMD N 00888000
Ne 4 "/DAT1"
Po 4920 1791
$EndPAD
$EndMODULE uSD-Card
$DRAWSEGMENT
Po 0 41900 20600 41900 19600 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 41900 24900 42500 24900 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 41900 25400 41900 24900 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 40600 25400 41900 25400 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 41900 20600 44500 20600 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 46400 21100 48400 21100 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 45900 20600 46400 21100 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 45300 20600 45900 20600 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 40600 19600 41900 19600 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 40600 25400 40600 19600 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$TEXTPCB
Te "LIGHTS 100901"
Po 44400 23700 400 400 70 0
De 15 1 0 Normal
$EndTEXTPCB
$TEXTPCB
Te "BEN BLINKEN"
Po 44100 22900 400 400 70 0
De 15 1 0 Normal
$EndTEXTPCB
$DRAWSEGMENT
Po 0 48400 24900 42500 24900 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 48400 21100 48400 24900 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 45300 20900 45300 20600 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 44800 20900 45300 20900 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 44500 20600 44800 20900 40
De 28 0 900 0 0
$EndDRAWSEGMENT
$TRACK
Po 0 47420 23241 41959 23241 100 -1
De 15 0 1 0 800
Po 0 41700 23500 41544 23500 100 -1
De 15 0 1 0 400
Po 0 41959 23241 41700 23500 100 -1
De 15 0 1 0 0
Po 0 41544 23500 41544 23000 100 -1
De 15 0 1 0 C00
Po 0 47420 22377 42177 22377 100 -1
De 15 0 2 0 800
Po 0 41800 22000 41544 22000 100 -1
De 15 0 2 0 400
Po 0 42177 22377 41800 22000 100 -1
De 15 0 2 0 0
Po 0 41544 22500 41544 22000 100 -1
De 15 0 2 0 C00
Po 0 47420 24108 41808 24108 100 -1
De 15 0 3 0 800
Po 0 41700 24000 41544 24000 100 -1
De 15 0 3 0 400
Po 0 41808 24108 41700 24000 100 -1
De 15 0 3 0 0
Po 0 41544 24500 41544 24000 100 -1
De 15 0 3 0 C00
Po 0 47420 24541 42003 24541 100 -1
De 15 0 4 0 800
Po 0 42003 24541 41544 25000 100 -1
De 15 0 4 0 400
Po 0 47420 21511 42555 21511 100 -1
De 15 0 5 0 800
Po 0 42555 21511 41544 20500 100 -1
De 15 0 5 0 400
Po 0 41544 20500 41544 20000 100 -1
De 15 0 5 0 C00
Po 0 47420 21944 42244 21944 100 -1
De 15 0 6 0 800
Po 0 41800 21500 41544 21500 100 -1
De 15 0 6 0 400
Po 0 42244 21944 41800 21500 100 -1
De 15 0 6 0 0
Po 0 41544 21500 41544 21000 100 -1
De 15 0 6 0 C00
Po 0 40956 20500 40956 20000 100 -1
De 15 0 7 0 C00
Po 0 40956 21000 40956 20500 100 -1
De 15 0 7 0 C00
Po 0 40956 21500 40956 21000 100 -1
De 15 0 7 0 C00
Po 0 40956 22000 40956 21500 100 -1
De 15 0 7 0 C00
Po 0 40956 22500 40956 22000 100 -1
De 15 0 7 0 C00
Po 0 40956 23000 40956 22500 100 -1
De 15 0 7 0 C00
Po 0 40956 23500 40956 23000 100 -1
De 15 0 7 0 C00
Po 0 40956 24000 40956 23500 100 -1
De 15 0 7 0 C00
Po 0 40956 24500 40956 24000 100 -1
De 15 0 7 0 C00
Po 0 40956 25000 40956 24500 100 -1
De 15 0 7 0 C00
$EndTRACK
$ZONE
$EndZONE
$EndBOARD

101
bbl.pro Normal file
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@ -0,0 +1,101 @@
update=Wed Sep 1 04:01:00 2010
version=1
last_client=pcbnew
[cvpcb]
version=1
NetITyp=0
NetIExt=.net
PkgIExt=.pkg
NetDir=
LibDir=
NetType=0
[cvpcb/libraries]
EquName1=devcms
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
SimCmd=
UseNetN=0
LabSize=60
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=special
LibName13=microcontrollers
LibName14=dsp
LibName15=microchip
LibName16=analog_switches
LibName17=motorola
LibName18=texas
LibName19=intel
LibName20=audio
LibName21=interface
LibName22=digital-audio
LibName23=philips
LibName24=display
LibName25=cypress
LibName26=siliconi
LibName27=opto
LibName28=atmel
LibName29=contrib
LibName30=valves
[general]
version=1
[pcbnew]
version=1
PadDrlX=320
PadDimH=600
PadDimV=600
BoardThickness=630
SgPcb45=1
TxtPcbV=800
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
VEgarde=100
DrawLar=150
EdgeLar=40
TxtLar=120
MSegLar=150
LastNetListRead=bbl.net
[pcbnew/libraries]
LibDir=
LibName1=../ben-wpan/modules/stdpass
LibName2=../kicad-libs/modules/usd-card

290
bbl.sch Normal file
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@ -0,0 +1,290 @@
EESchema Schematic File Version 2 date Wed Sep 1 02:15:25 2010
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:bbl-cache
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 1 1
Title ""
Date "1 sep 2010"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
Text Label 7350 4800 0 60 ~ 0
DAT1(PD11)
Text Label 7350 4700 0 60 ~ 0
DAT0(PD10)
Text Label 7350 4600 0 60 ~ 0
VSS
Text Label 7350 4500 0 60 ~ 0
CLK(PD09)
Text Label 7350 4400 0 60 ~ 0
VDD
Text Label 7350 4300 0 60 ~ 0
CMD(PD08)
Text Label 7350 4200 0 60 ~ 0
DAT3/CD(PD13)
Text Label 7350 4100 0 60 ~ 0
DAT2(PD12)
Wire Wire Line
5300 4800 8250 4800
Wire Wire Line
8250 4600 7050 4600
Wire Wire Line
8250 4400 7050 4400
Connection ~ 5450 2550
Wire Wire Line
6600 2550 5450 2550
Wire Wire Line
6600 2550 6600 4200
Wire Wire Line
6600 4200 8250 4200
Wire Wire Line
5450 4500 5250 4500
Wire Wire Line
5450 4500 5450 4200
Wire Wire Line
5450 4200 5250 4200
Wire Wire Line
5450 3300 5250 3300
Wire Wire Line
5450 3300 5450 3000
Wire Wire Line
5450 3000 5250 3000
Wire Wire Line
5450 2100 5250 2100
Wire Wire Line
5450 2100 5450 1800
Wire Wire Line
5450 1800 5250 1800
Connection ~ 4600 4200
Wire Wire Line
4600 4200 4850 4200
Connection ~ 4600 3600
Wire Wire Line
4600 3600 4850 3600
Connection ~ 4600 3000
Wire Wire Line
4600 3000 4850 3000
Connection ~ 4600 2400
Wire Wire Line
4600 2400 4850 2400
Connection ~ 4600 2100
Wire Wire Line
4600 2100 4850 2100
Wire Wire Line
4600 4800 4800 4800
Wire Wire Line
4600 4800 4600 1800
Wire Wire Line
4600 1800 4850 1800
Wire Wire Line
4600 2400 4600 2450
Wire Wire Line
4850 2700 4600 2700
Connection ~ 4600 2700
Wire Wire Line
4850 3300 4600 3300
Connection ~ 4600 3300
Wire Wire Line
4850 3900 4600 3900
Connection ~ 4600 3900
Wire Wire Line
4850 4500 4600 4500
Connection ~ 4600 4500
Wire Wire Line
5450 2400 5250 2400
Wire Wire Line
5450 2400 5450 2700
Wire Wire Line
5450 2700 5250 2700
Wire Wire Line
5450 3600 5250 3600
Wire Wire Line
5450 3600 5450 3900
Wire Wire Line
5450 3900 5250 3900
Wire Wire Line
8250 4100 6750 4100
Wire Wire Line
6750 4100 6750 1950
Wire Wire Line
6750 1950 5450 1950
Connection ~ 5450 1950
Wire Wire Line
8250 4300 6450 4300
Wire Wire Line
6450 4300 6450 3150
Wire Wire Line
6450 3150 5450 3150
Connection ~ 5450 3150
Wire Wire Line
8250 4500 6300 4500
Wire Wire Line
6300 4500 6300 3750
Wire Wire Line
6300 3750 5450 3750
Connection ~ 5450 3750
Wire Wire Line
8250 4700 6150 4700
Wire Wire Line
6150 4700 6150 4350
Wire Wire Line
6150 4350 5450 4350
Connection ~ 5450 4350
NoConn ~ 7050 4600
NoConn ~ 7050 4400
$Comp
L LED D2
U 1 1 4C7DA297
P 5050 2100
F 0 "D2" H 5050 2200 50 0000 C CNN
F 1 "LED" H 5050 2000 50 0000 C CNN
F 2 "0603" H 5050 2100 60 0001 C CNN
1 5050 2100
-1 0 0 -1
$EndComp
$Comp
L LED D1
U 1 1 4C7DA295
P 5050 1800
F 0 "D1" H 5050 1900 50 0000 C CNN
F 1 "LED" H 5050 1700 50 0000 C CNN
F 2 "0603" H 5050 1800 60 0001 C CNN
1 5050 1800
1 0 0 -1
$EndComp
$Comp
L CONN_8 P1
U 1 1 4C7DA28C
P 8600 4450
F 0 "P1" V 8550 4450 60 0000 C CNN
F 1 "CONN_8" V 8650 4450 60 0000 C CNN
F 2 "uSD-Card" H 8600 4450 60 0001 C CNN
1 8600 4450
1 0 0 -1
$EndComp
$Comp
L LED D3
U 1 1 4C7D7F3A
P 5050 2400
F 0 "D3" H 5050 2500 50 0000 C CNN
F 1 "LED" H 5050 2300 50 0000 C CNN
F 2 "0603" H 5050 2400 60 0001 C CNN
1 5050 2400
1 0 0 -1
$EndComp
$Comp
L LED D4
U 1 1 4C7D7F39
P 5050 2700
F 0 "D4" H 5050 2800 50 0000 C CNN
F 1 "LED" H 5050 2600 50 0000 C CNN
F 2 "0603" H 5050 2700 60 0001 C CNN
1 5050 2700
-1 0 0 -1
$EndComp
$Comp
L LED D5
U 1 1 4C7D7F38
P 5050 3000
F 0 "D5" H 5050 3100 50 0000 C CNN
F 1 "LED" H 5050 2900 50 0000 C CNN
F 2 "0603" H 5050 3000 60 0001 C CNN
1 5050 3000
1 0 0 -1
$EndComp
$Comp
L LED D6
U 1 1 4C7D7F37
P 5050 3300
F 0 "D6" H 5050 3400 50 0000 C CNN
F 1 "LED" H 5050 3200 50 0000 C CNN
F 2 "0603" H 5050 3300 60 0001 C CNN
1 5050 3300
-1 0 0 -1
$EndComp
$Comp
L LED D7
U 1 1 4C7D7F35
P 5050 3600
F 0 "D7" H 5050 3700 50 0000 C CNN
F 1 "LED" H 5050 3500 50 0000 C CNN
F 2 "0603" H 5050 3600 60 0001 C CNN
1 5050 3600
1 0 0 -1
$EndComp
$Comp
L LED D8
U 1 1 4C7D7F34
P 5050 3900
F 0 "D8" H 5050 4000 50 0000 C CNN
F 1 "LED" H 5050 3800 50 0000 C CNN
F 2 "0603" H 5050 3900 60 0001 C CNN
1 5050 3900
-1 0 0 -1
$EndComp
$Comp
L R R1
U 1 1 4C7D7F04
P 5050 4800
F 0 "R1" V 5130 4800 50 0000 C CNN
F 1 "47" V 5050 4800 50 0000 C CNN
F 2 "0603" H 5050 4800 60 0001 C CNN
1 5050 4800
0 -1 -1 0
$EndComp
$Comp
L LED D10
U 1 1 4C7D7EC0
P 5050 4500
F 0 "D10" H 5050 4600 50 0000 C CNN
F 1 "LED" H 5050 4400 50 0000 C CNN
F 2 "0603" H 5050 4500 60 0001 C CNN
1 5050 4500
-1 0 0 -1
$EndComp
$Comp
L LED D9
U 1 1 4C7D7EBC
P 5050 4200
F 0 "D9" H 5050 4300 50 0000 C CNN
F 1 "LED" H 5050 4100 50 0000 C CNN
F 2 "0603" H 5050 4200 60 0001 C CNN
1 5050 4200
1 0 0 -1
$EndComp
$EndSCHEMATC

12
bbl/Makefile Normal file
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CC=mipsel-openwrt-linux-uclibc-gcc
CFLAGS=-Wall -g
.PHONY: all clean spotless
all: bbl
clean:
rm -f bbl
spotless: clean

116
bbl/bbl.c Normal file
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/*
* bbl.c - Read or write any CPU register
*
* Written 2010 by Werner Almesberger <werner@openmoko.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <unistd.h>
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#include <signal.h>
#include <fcntl.h>
#include <sys/mman.h>
#define PDDATS 0x10010314
#define PDDATC 0x10010318
#define PDFUNC 0x10010348
#define PDDIRS 0x10010364
#define PDDIRC 0x10010368
#define LEDS 10
#define LED_MASK 0x3f00
#define LED_SEL 11
#define DELAY_US 50000
#define PAGE_SIZE 4096
#define GPIO_BASE 0x10010000
#define REG(n) (*(uint32_t *) (mem+(n)-GPIO_BASE))
static volatile void *mem;
/* ----- Command-line parsing ---------------------------------------------- */
static int map(int g)
{
switch (g) {
case 0:
return 12;
case 1:
return 13;
case 2:
return 8;
case 3:
return 9;
case 4:
return 10;
default:
abort();
}
}
static void set(int n)
{
if (n & 1) {
REG(PDDATC) = LED_MASK;
REG(PDDATS) = 1 << map(n >> 1);
} else {
REG(PDDATS) = LED_MASK;
REG(PDDATC) = 1 << map(n >> 1);
}
}
static void die(int sig)
{
REG(PDDIRC) = LED_MASK;
_exit(0);
}
int main(int argc, char **argv)
{
int fd, i;
fd = open("/dev/mem", O_RDWR);
if (fd < 0) {
perror("/dev/mem");
exit(1);
}
mem = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd,
GPIO_BASE);
if (mem == MAP_FAILED) {
perror("mmap");
exit(1);
}
signal(SIGINT, die);
REG(PDFUNC) = LED_MASK;
REG(PDDIRS) = LED_MASK;
while (1) {
for (i = 0; i != LEDS-1; i++) {
set(i);
usleep(DELAY_US);
}
for (i = LEDS-1; i != 0; i--) {
set(i);
usleep(DELAY_US);
}
}
return 0;
}

4
cam/Makefile Normal file
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@ -0,0 +1,4 @@
.PHONY: pcb
pcb:
./doit >job

21
cam/doit Executable file
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@ -0,0 +1,21 @@
#!/bin/sh -e
DIR=/home/moko/svn.openmoko.org/developers/werner/cncmap
RECT=$DIR/rect/rect
ALIGN=$DIR/align/align
ZMAP=$DIR/zmap/zmap
GP2RML=$DIR/gp2rml/gp2rml
GEN=${1:-./pcb.pl}
rdata="17.8 8.9 -55.7 72.0 9.6 -55.3 17.8 68.5 -55.5"
# we need quite a large Z adjustment due to the table's vertical flexibility
Z=-55.40
rect=`$RECT $rdata | awk '{$3 = ""; print}'`
$GEN |
awk '{ if ($3 != "") $3 += '$Z'; print $0; }' |
$ALIGN 0 1 $rect |
# angle, reference (lower left corner), rect
$GP2RML 1.5 0.1 0.1
# clearance, xy speed, z speed

66
cam/pcb.pl Executable file
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#!/usr/bin/perl
$d = 2.54/1000*12;
$r = $d/2+0.25;
sub orig
{
$x0 = $_[0];
$y0 = $_[1];
}
sub mil
{
return $_[0]/1000*25.4;
}
sub cut
{
if (defined $x) {
if ($x == $_[0]+$x0 && $y == $_[1]+$y0) {
shift @_;
shift @_;
} else {
print "\n";
}
}
while (@_) {
$x = shift @_;
$y = shift @_;
($x, $y) = (-$y, $x);
$x += $x0;
$y += $y0;
print "$x $y $z\n";
}
}
sub one
{
&cut(
&mil( 0)-$r, &mil( 0)-$r,
&mil( 0)-$r, &mil(580)+$r,
&mil( 130)+$r, &mil(580)+$r,
&mil( 130)+$r, &mil(480)+$r,
&mil( 390)+$r, &mil(480)+$r,
&mil( 420)+$r, &mil(450)+$r,
&mil( 470)-$r, &mil(450)+$r,
&mil( 470)-$r, &mil(480)+$r,
&mil( 520)+$r, &mil(480)+$r,
&mil( 570)+$r, &mil(430)+$r,
&mil( 780)+$r, &mil(430)+$r,
&mil( 780)+$r, &mil( 50)-$r,
&mil( 130)+$r, &mil( 50)-$r,
&mil( 130)+$r, &mil( 0)-$r,
&mil( 0)-$r, &mil( 0)-$r);
}
$z = -0.8;
# x: corner offset, compensation for rotation, array position
# y: corner offet
&orig(5+11+19.5*2, 5+26+1)
&one;