mirror of
git://projects.qi-hardware.com/ben-blinkenlights.git
synced 2024-11-19 11:20:37 +02:00
77adf43551
- README.old: moved old content here - README: updated and extended compatibility chart
84 lines
2.5 KiB
Plaintext
84 lines
2.5 KiB
Plaintext
UBB-VGA - VGA-like output via UBB
|
|
=================================
|
|
|
|
*** THIS IS THE README FOR AN OLDER VERSION OF THE HARDWARE AND THE DRIVER ***
|
|
|
|
Sources
|
|
-------
|
|
|
|
Timing and the idea for the voltage divider is from:
|
|
http://faculty.lasierra.edu/~ehwang/public/mypublications/VGA Monitor Controller.pdf
|
|
|
|
More timing parameters:
|
|
http://tinyvga.com/vga-timing/640x480@60Hz
|
|
|
|
|
|
Signal 8:10 VGA
|
|
------- ------- ---
|
|
R DAT2 1
|
|
VSYNC DAT3 14
|
|
HSYNC CMD 13
|
|
G DAT0 2
|
|
B DAT1 3
|
|
GND GND 5
|
|
|
|
http://en.wikipedia.org/wiki/VGA_connector
|
|
|
|
|
|
Timing
|
|
------
|
|
|
|
Since the Ingenic CPUs take about 8.5 PCLK cycles for a GPIO set or clear,
|
|
and we can only set or clear a set of signals in GPIO operation, but not
|
|
set some and clear others, we cannot have a real 320 horizontal pixels.
|
|
|
|
Instead, set and clear operations alternate. This means that the best-case
|
|
resolution is equivalent to 320 pixels (if the original pixel boundaries
|
|
coincide with the set/clear phases), but it can be as low as 160 pixels if
|
|
the boundaries don't match.
|
|
|
|
Furthermore, timing is still a bit too tight. We therefore use a pixel
|
|
clock that's about 10% slower than the original. Luckily, most monitors
|
|
don't mind.
|
|
|
|
|
|
Single/double mode
|
|
------------------
|
|
|
|
In single mode, only one set/clear can be performed per pixel. They are
|
|
arranges such that the first pixel can only turn on channels, the
|
|
following pixel can only turn off channels, and so on.
|
|
|
|
In double mode, a set and a clear is performed per pixel. This changes
|
|
the timing such that it differs substantially from VGA, but some
|
|
monitors can still synchronize with this.
|
|
|
|
The resulting signals for various bit patterns are shown in mapping.fig
|
|
Each group shows the input pixels, and signal for single mode, and the
|
|
signal for double mode. "S" indicates a point where the channel can be
|
|
turned on, "C" indicates a point where it can be turned off.
|
|
|
|
Note that there are probably other mapping algorithms that would yield
|
|
better results. The mapping is not a very performance-critical part of
|
|
ubb-vga. Improvements are welcome.
|
|
|
|
|
|
Compatibility
|
|
-------------
|
|
|
|
ubb-vga in single mode has been tested with the following monitors:
|
|
|
|
Display Monitor size Quality
|
|
----------------------- --------------- ----------------------------------
|
|
Xenon XEN-1510T 15", 1024x768 good
|
|
Samsung 206NW 20", 1680x1050 poor (horizontal instability)
|
|
LG W2243C 22", 1920x1080 acceptable (slight instability)
|
|
LG W2243L 22", 1920x1080 acceptable (slight instability)
|
|
|
|
In double mode:
|
|
|
|
Display Pixels missing Quality
|
|
left/right
|
|
----------------------- --------------- ------------------
|
|
Xenon XEN-1510T 5 / 25 good
|