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76 lines
1.6 KiB
C
76 lines
1.6 KiB
C
/*
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* libubb/mmcclk.c - Calculate MMC bus clock speed
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*
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* Written 2013 by Werner Almesberger
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* Copyright 2013 Werner Almesberger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <ubb/regs4740.h>
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#include <ubb/mmcclk.h>
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#define MSCCDR_MAX 32
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#define CLKRT_MAX 8
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#define BUS_LIMIT_MHZ 56 /* nominally, the limit is 20 MHz */
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static int calculate_clock(struct mmcclk *dsc)
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{
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dsc->bus_clk_hz = dsc->sys_clk_hz/(dsc->clkdiv+1.0)/(1 << dsc->clkrt);
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return dsc->bus_clk_hz <= BUS_LIMIT_MHZ*1000000;
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}
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void mmcclk_first(struct mmcclk *dsc, int sys_clk_hz)
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{
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if (sys_clk_hz)
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dsc->sys_clk_hz = sys_clk_hz;
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else
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dsc->sys_clk_hz =
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(CPCCR >> 21) & 1 ? BEN_PLL_CLK_HZ : BEN_PLL_CLK_HZ/2;
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dsc->clkdiv = dsc->clkrt = 0;
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if (calculate_clock(dsc))
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return;
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mmcclk_next(dsc);
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}
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int mmcclk_next(struct mmcclk *dsc)
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{
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while (1) {
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if (++dsc->clkdiv == MSCCDR_MAX) {
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dsc->clkdiv = 0;
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if (++dsc->clkrt == CLKRT_MAX)
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return 0;
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}
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if (calculate_clock(dsc))
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return 1;
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}
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}
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void mmcclk_start(struct mmcclk *dsc)
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{
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MSCCDR = dsc->clkdiv; /* set controller clock */
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CLKGR &= ~(1 << 7); /* enable MSC clock */
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MSC_STRPCL = 1 << 3; /* reset the MSC */
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while (MSC_STAT & (1 << 15)); /* wait until reset finishes */
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MSC_CLKRT = dsc->clkrt; /* set bus clock */
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MSC_STRPCL = 2; /* start MMC bus clock output */
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}
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void mmcclk_stop(void)
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{
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MSC_STRPCL = 1; /* stop MMC bus clock output */
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}
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