mirror of
git://projects.qi-hardware.com/ben-blinkenlights.git
synced 2024-06-29 00:02:01 +03:00
541 lines
11 KiB
C
541 lines
11 KiB
C
/*
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* ubb-vga.c - Output video on UBB with more or less VGA timing
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*
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* Written 2011 by Werner Almesberger
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* Copyright 2011 Werner Almesberger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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/*
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* WARNING: this program does very nasty things to the Ben and it doesn't
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* like company. In particular, it resents:
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*
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* - the MMC driver - disable it with
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* echo jz4740-mmc.0 >/sys/bus/platform/drivers/jz4740-mmc/unbind
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* - the AT86RF230/1 kernel driver - use a kernel that doesn't have it
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* - anything that accesses the screen - kill GUI, X server, etc.
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* - the screen blanker - either disable it or make sure the screen stays
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* dark, e.g., with
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* echo 1 >/sys/devices/platform/jz4740-fb/graphics/fb0/blank
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* - probably a fair number of other daemons and things as well - best to
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* kill them all.
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <string.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include "regs4740.h"
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#include "ubb-vga.h"
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#define REG_BASE_PTR base
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static volatile void *base;
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static int bad;
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static int keep_lcd = 0;
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#define US(us) ((uint16_t) ((us)*112))
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static const struct mode mode_db[] = {
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/* name xres yres clkdiv vfront hsync hback htotal */
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/* vsync vback */
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{ "640x480", 640, 480, 12, 2, 32, 14, US(2.80), US(1.30), US(32.1) },
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{ "640x480/58", 640, 480, 12, 2, 10, 33, US(3.81), US(1.91), US(32.7) },
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{ "640x480/61", 640, 480, 11, 2, 9, 29, US(2.50), US(4.06), US(31.5) },
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{ "640x480/70", 640, 480, 9, 2, 8, 29, US(1.90), US(2.06), US(24.8) },
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{ "800x600/54", 800, 600, 8, 2, 32, 14, US(4.81), US(0.79), US(28.8) },
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{ "800x600/56", 800, 600, 8, 2, 1, 22, US(2.00), US(3.56), US(28.5) },
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{ "800x600/72", 800, 600, 5, 3, 1, 27, US(2.14), US(2.70), US(22.0) },
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/* the 1024x768 below is not great but has good parameter tolerance */
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{ "1024x768", 1024, 768, 8, 2, 32, 14, US(4.51), US(0.79), US(36.0) },
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/* illustrate underruns (without DMA) */
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{ "1024x768ur", 1024, 768, 7, 2, 32, 14, US(2.21), US(0.79), US(33.5) },
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{ "1024x768/53",1024, 768, 5, 2, 32, 14, US(1.31), US(0.79), US(23.1) },
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{ "1024x768/50",1024, 768, 5, 6, 3, 29, US(2.10), US(2.46), US(24.5) },
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{ NULL }
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};
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/*
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* 640x480: loosely based on the timing from "Build a VGA Monitor
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* Controller" by Enoch Hwang
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*
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*
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* 640x480/58: http://tinyvga.com/vga-timing/640x480@60Hz
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*
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* H: 3.81+0.64+25.42+1.91 us = 31.78 us
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*
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* Pixel clock is 25.175 MHz. We have 25.85 MHz, thus:
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* 25.42/25.75*25.175 = 24.85
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*
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* htotal should be 31.77+(24.85-25.175) = 31.445, but we actually need more.
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* Seems that our hfront is about 1.7 us.
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*
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* Observation: bad FIFO jitter.
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*
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*
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* 640x480/70: http://tinyvga.com/vga-timing/640x480@73Hz
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*
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* That's a pretty ugly adaptation. The DMA really seems to dislike the 73 Hz
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* parameters.
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*
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*
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* 800x600/54: just a lucky combination
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*
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*
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* 800x600/56: http://tinyvga.com/vga-timing/800x600@56Hz
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*
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* Note that we have the sync pulses upside-down.
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*
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*
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* 800x600/7: yet another lucky combination
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*
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*
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* 1024x768/50: loosely based on http://tinyvga.com/vga-timing/1024x768@60Hz
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*/
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const struct mode *mode = mode_db;
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static uint32_t clkrt = 0;
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/* ----- I/O pin assignment ------------------------------------------------ */
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#define DAT0 (1 << 10)
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#define DAT1 (1 << 11)
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#define DAT2 (1 << 12)
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#define DAT3 (1 << 13)
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#define CMD (1 << 8)
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#define CLK (1 << 9)
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#define R DAT3
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#define G DAT0
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#define B DAT1
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#define Y DAT2
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#define HSYNC CMD
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#define VSYNC CLK
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/* ----- Ben hardware ------------------------------------------------------ */
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#define TIMER 7
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#define DMA 0
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#define KEY_MASK 0x5f70000
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static uint32_t old_icmr;
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static uint32_t old_clkgr;
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static uint32_t old_lcdctrl;
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static void disable_interrupts(void)
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{
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/*
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* @@@ Race condition alert ! If we get interrupted/preempted between
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* reading ICMR and masking all interrupts, and the code that runs
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* between these two operations changes ICMR, then we may set an
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* incorrect mask when restoring interrupts, which may hang the system.
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*/
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old_icmr = ICMR;
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ICMSR = 0xffffffff;
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}
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static void enable_interrupts(void)
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{
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ICMCR = ~old_icmr;
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}
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/*
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* @@@ Disabling the LCD clock will hang operations that depend on the LCD
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* subsystem to advance. This includes the screen saver.
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*/
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static void disable_lcd(void)
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{
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old_clkgr = CLKGR;
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CLKGR = old_clkgr | 1 << 10;
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}
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static void enable_lcd(void)
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{
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CLKGR = old_clkgr;
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}
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static void tame_lcd(void)
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{
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old_lcdctrl = LCDCTRL;
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/* LCDCTRL.BST = 0, for 4 word burst, the shortest available */
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LCDCTRL = old_lcdctrl & 0xfffffff;
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}
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static void restore_lcd(void)
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{
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LCDCTRL = old_lcdctrl;
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}
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static void get_timer(void)
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{
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TSCR = 1 << TIMER; /* enable clock */
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TCSR(TIMER) = 1; /* count at PCLK/1 */
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TDFR(TIMER) = 0xffff; /* count to 0xffff */
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TESR = 1 << TIMER;
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}
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static void release_timer(void)
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{
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TECR = 1 << TIMER;
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TSSR = 1 << TIMER;
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}
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void *map(off_t addr, size_t size)
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{
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int fd;
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void *mem;
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fd = open("/dev/mem", O_RDWR | O_SYNC);
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if (fd < 0) {
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perror("/dev/mem");
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exit(1);
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}
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mem = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr);
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if (mem == MAP_FAILED) {
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perror("mmap");
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exit(1);
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}
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return mem;
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}
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static void ben_setup(void)
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{
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base = map(SOC_BASE, REG_WINDOW);
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}
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/* ----- Delay logic ------------------------------------------------------- */
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static void delay(uint16_t cycles)
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{
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static uint16_t next = 0;
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uint16_t t;
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next += cycles;
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TDHR(TIMER) = next;
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TFCR = 1 << (TIMER+16);
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while (!(TFR & (1 << (TIMER+16))));
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t = next+24-TCNT(TIMER);
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t >>= 1;
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while (t--)
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asm("");
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}
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/* ----- Frame buffer output ----------------------------------------------- */
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static void setup(void)
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{
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mlockall(MCL_CURRENT | MCL_FUTURE);
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ben_setup();
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PDFUNS = R | G | B | Y;
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PDFUNC = VSYNC | HSYNC;
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PDDIRS = VSYNC | HSYNC | R | G | B | Y;
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PDDATS = VSYNC | HSYNC;
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PDDATC = R | G | B | Y;
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MSCCDR = mode->clkdiv; /* set the MSC clock to 336 MHz / 12 = 28 MHz */
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CLKGR &= ~(1 << 7); /* enable MSC clock */
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while (MSCCDR & 1) {
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MSCCDR >>= 1;
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clkrt++;
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}
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}
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static void setup_noirq(void)
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{
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if (keep_lcd)
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tame_lcd();
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else
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disable_lcd();
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get_timer();
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DMAC = 1;
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DCS(DMA) = (1 << 3) | (1 << 2);
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DCS(DMA) = 0;
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DCM(DMA) =
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(1 << 23) | /* source address increment */
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(4 << 8); /* transfer size is 32 bytes */
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DRT(DMA) = 26; /* MSC transmit-fifo-empty transfer request */
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}
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static void cleanup_noirq(void)
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{
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DMAC = 0;
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DCS(DMA) = (1 << 3) | (1 << 2);
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DCS(DMA) = 0;
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release_timer();
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if (keep_lcd)
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restore_lcd();
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else
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enable_lcd();
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}
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static void line(unsigned long line)
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{
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/* Back porch */
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MSC_STRPCL = 1 << 3; /* reset the MSC */
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// DCS(DMA) = (1 << 31) | (1 << 3) | (1 << 2);
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DCS(DMA) = 1 << 31;
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DSA(DMA) = line;
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DTA(DMA) = REG_PADDR(MSC_TXFIFO); /* MUST set this each time */
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DTC(DMA) = (mode->xres+63) >> 6;
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delay(mode->hback_cycles);
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/* HSYNC */
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PDDATC = HSYNC;
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MSC_CLKRT = clkrt; /* bus clock = MSC clock / n */
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MSC_STRPCL = 2; /* start MMC clock output */
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MSC_RESTO = 0xffff;
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MSC_CMDAT =
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(2 << 9) | /* 4 bit bus */
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(1 << 8) | /* DMA */
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(1 << 4) | /* write */
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(1 << 3) | /* with data transfer */
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1; /* R1 response */
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MSC_STRPCL = 4; /* START_OP */
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DCS(DMA) =
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(1 << 31) | /* no descriptor */
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1;
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delay(mode->hsync_cycles);
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// MSC_TXFIFO = 0xffffffff;
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/* Front porch */
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PDFUNS = CMD;
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PDDATS = HSYNC;
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PDFUNC = CMD;
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delay(mode->line_cycles-mode->hback_cycles-mode->hsync_cycles);
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MSC_TXFIFO = 0;
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if (MSC_STAT & 3)
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bad++;
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}
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static void hdelay(int cycles)
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{
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while (cycles--) {
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PDDATC = HSYNC;
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delay(mode->hsync_cycles);
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PDDATS = HSYNC;
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delay(mode->line_cycles-mode->hsync_cycles);
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}
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}
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static void frame(const unsigned long *f)
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{
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const unsigned long *p;
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/* VSYNC */
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PDDATC = VSYNC;
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hdelay(mode->vsync_lines);
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PDDATS = VSYNC;
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/* Front porch */
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hdelay(mode->vfront_lines-1);
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/*
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* The horizontal back porch of the previous line is handled inside
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* "line", so we have to wait for less than a full line here.
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*/
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PDDATC = HSYNC;
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delay(mode->hsync_cycles);
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PDDATS = HSYNC;
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delay(mode->line_cycles-mode->hback_cycles-mode->hsync_cycles);
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for (p = f; p != f+mode->yres; p++)
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line(*p);
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delay(mode->hback_cycles);
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/* Back porch */
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hdelay(mode->vback_lines);
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}
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/* ----- Command-line parsing and main loop -------------------------------- */
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static void session(void (*gen)(void **fb, int xres, int yres), int frames)
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{
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void **f_virt;
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const unsigned long *f_phys;
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int i, bytes;
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ccube_init();
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bytes = mode->xres/2;
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bytes = (bytes+31) & ~31;
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f_virt = calloc_phys_vec(mode->yres, bytes);
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gen(f_virt, mode->xres, mode->yres);
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f_phys = xlat_virt(f_virt, mode->yres);
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disable_interrupts();
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setup_noirq();
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TCNT(TIMER) = 0;
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for (i = 0; !frames || i != frames; i++) {
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frame(f_phys);
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if (DTC(DMA)) {
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fprintf(stderr,
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"DMA locked up. Need hardware reset.\n");
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break;
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}
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if (!frames && (PDPIN & KEY_MASK) != KEY_MASK)
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break;
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}
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cleanup_noirq();
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enable_interrupts();
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}
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static void list_modes(void)
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{
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const struct mode *m;
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for (m = mode_db; m->name; m++) {
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printf("\"%s\", %dx%d:\n", m->name, m->xres, m->yres);
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printf("\t336/%d = %5.2f MHz\n",
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m->clkdiv+1, 336.0/(m->clkdiv+1));
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printf("\tH: %4.2f+...+%4.2f = %5.2f us\n",
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CYCLES(m->hsync_cycles), CYCLES(m->hback_cycles),
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CYCLES(m->line_cycles));
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printf("\tV: %d+%d+%d+%d lines, %5.2f Hz\n",
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m->vsync_lines, m->vfront_lines, m->yres, m->vback_lines,
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112000000.0/m->line_cycles/
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(m->vsync_lines+m->vfront_lines+m->yres+m->vback_lines));
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}
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}
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static void usage(const char *name)
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{
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fprintf(stderr,
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"usage: %s [-2] [-t] [-m resolution] [frames [file]]\n"
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" %s -l\n\n"
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" frames number of frames to display\n"
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" file PPM file\n\n"
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" -2 keep on refreshing the LCD display (experimental)\n"
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" -l list available modes\n"
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" -m mode select the display mode, default \"%s\"\n"
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" -t generate a test image\n"
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, name, name, mode_db[0].name);
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exit(1);
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}
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int main(int argc, char *const *argv)
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{
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void (*gen)(void **fb, int xres, int yres) = grabfb;
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int frames = 0;
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int c;
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while ((c = getopt(argc, argv, "2lm:t")) != EOF)
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switch (c) {
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case '2':
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keep_lcd = 1;
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break;
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case 'l':
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list_modes();
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exit(0);
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case 'm':
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for (mode = mode_db; mode->name; mode++)
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if (!strcmp(mode->name, optarg))
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break;
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if (!mode->name) {
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fprintf(stderr, "no mode \"%s\"\n", optarg);
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exit(1);
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}
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break;
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case 't':
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gen = tstimg;
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break;
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default:
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usage(*argv);
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}
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switch (argc-optind) {
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case 2:
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img_name = argv[optind+1];
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gen = ppmimg;
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/* fall through */
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case 1:
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frames = atoi(argv[optind]);
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break;
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case 0:
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break;
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default:
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usage(*argv);
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}
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setup();
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session(gen, frames);
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#if 0
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printf("clkdiv: %d, /%d /%d\n", mode->clkdiv,
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(MSCCDR & 15)+1, 1 << (MSC_CLKRT & 7));
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#endif
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if (bad)
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printf("%d timeout%s\n", bad, bad == 1 ? "" : "s");
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return 0;
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}
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