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ben-wpan/TODO

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General
=======
Things not done yet
-------------------
- document directory hierarchy
- make sure all files have a copyright header or are listed in AUTHORS
- connect all the bits and pieces of the build system
- combine io-parts.h generation
- combine "standard" EP0 commands, such as *_ID and *_BUILD
- implement return to DFU in application's EP0 protocol
- consider removing *_ID and using bcdDevice instead
Bugs to fix
-----------
- builds fail if .version isn't there yet
atrf
====
AT86RF230-based IEEE 802.15.4 transceiver. Two variantes: one to make a USB
dongle for use with any Linux host, and one that connects with SPI directly
inside a Ben.
Things not done yet
-------------------
- examine spectrum around carrier frequency and first harmonic to look for
obvious distortions. Vary transmit power.
- measure throughput as a function of placement/distance, carrier frequency,
and transmit power
- atspi-txrx: suppport "extended mode" with IEEE 802.15.4 CSMA-CA for more
realistic throughput figures
- measure full spectrum (ideally up to 25 GHz, but just 2nd and 3rd harmonic
will already tell most of the story) with calibrated antenna for FCC/ETSI
compliance assessment. Vary transmit power.
- use IEEE 802.15.4 stack from linux-zigbee
- verify that the Ben can output an a) 16 MHz clock, and b) with +/- 40 ppm
- replace discrete balun and filter with integrated solution, to reduce BOM
size, maybe cost, insertion loss, and PCB space (see ATRF/ECN0003)
- check if we really need three DC blocking caps in the RF path
- change layout of transceiver side of the board for placement inside Ben
- define EMI filters for placement inside Ben
- check USB standard for recommended USB dongle dimensions
- change layout for straight USB dongle
- generate proper BOM
- implement sleep mode
Bugs to fix
-----------
- atrf vs. atspi naming is a bit confusing
ccrf
====
Board similar to the atrf, but with the TI/Chipcon CC2520.
cntr
====
Simple USB-based counter to measure a clock's long-time accuracy with
arbitrarily high precision, by comparing it to an NTP time reference.
Things not done yet
-------------------
- measure duty cycle
- use the LED to display activity on clock input and duty cycle
- consider using a comparator and a DAC to allow for programmable logic levels
- evaluate termination resistance
- document circuit design
- record beats between 16 bit counter polls and use them for the estimate
of lost cycles (2*1 is way too optimistic)
- include system clock resolution in accuracy calculation
- consider running shorter sliding windows to estimate drift
- consider detecting unusual half-periods
- consider using a reversed USB connector, to avoid having to cross D+/D- and,
worse, VBUS and GND
- test input performance by counting a source that emits a known number of
cycles
- consider using historical margins to sanity-check the current margin (if any
old.max < curr.min or old.min > curr.max, we have a problem) and to further
narrow the effective margin, thus achieving faster convergence. We would have
to consider temperature drift of the frequency source in this case.
- find out why frequency measurements always seem to start high and then slowly
drop