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git://projects.qi-hardware.com/ben-wpan.git
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116 lines
2.8 KiB
C
116 lines
2.8 KiB
C
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/*
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* lib/cwtest.c - Set up AT86RF230/231 constant wave test mode
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*
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* Written 2010-2011 by Werner Almesberger
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* Copyright 2010-2011 Werner Almesberger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include "at86rf230.h"
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#include "atrf.h"
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#include "misctxrx.h"
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#include "cwtest.h"
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static void enter_test_mode_230(struct atrf_dsc *dsc, uint8_t cont_tx)
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{
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atrf_buf_write(dsc, "", 1);
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atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC);
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atrf_reg_write(dsc, REG_CONT_TX_1, cont_tx);
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if (!atrf_test_mode(dsc)) {
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atrf_reset_rf(dsc);
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fprintf(stderr, "device does not support test mode\n");
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exit(1);
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}
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atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON);
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wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 20);
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atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START);
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}
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static void enter_test_mode_231(struct atrf_dsc *dsc, uint8_t cont_tx)
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{
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uint8_t buf[127];
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uint8_t status;
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switch (cont_tx) {
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case CONT_TX_M2M:
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fprintf(stderr,
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"-2 MHz mode is not supported by the AT86RF231\n");
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atrf_close(dsc);
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exit(1);
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case CONT_TX_M500K:
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memset(buf, 0, sizeof(buf));
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break;
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case CONT_TX_P500K:
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memset(buf, 0xff, sizeof(buf));
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break;
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default:
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abort();
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}
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atrf_reg_write(dsc, REG_IRQ_MASK, IRQ_PLL_LOCK); /* 2 */
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atrf_reg_write(dsc, REG_TRX_CTRL_1, 0); /* 3 */
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atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_FORCE_TRX_OFF); /* 4 */
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/* deleted step 5 - we don't need to enable CLKM */
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status = atrf_reg_read(dsc, REG_TRX_STATUS) & TRX_STATUS_MASK; /* 8 */
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if (status != TRX_STATUS_TRX_OFF) {
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fprintf(stderr, "expected status 0x%02x, got 0x%02x\n",
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TRX_STATUS_TRX_OFF, status);
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exit(1);
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}
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atrf_reg_write(dsc, REG_CONT_TX_0, CONT_TX_MAGIC); /* 9 */
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atrf_reg_write(dsc, REG_TRX_CTRL_2, OQPSK_DATA_RATE_2000); /*10 */
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atrf_reg_write(dsc, REG_RX_CTRL, 0xa7); /*11 */
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atrf_buf_write(dsc, buf, sizeof(buf)); /*12 */
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atrf_reg_write(dsc, REG_PART_NUM, 0x54); /*13 */
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atrf_reg_write(dsc, REG_PART_NUM, 0x46); /*14 */
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atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_PLL_ON); /*15 */
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wait_for_interrupt(dsc, IRQ_PLL_LOCK, IRQ_PLL_LOCK, 10, 0); /*16 */
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atrf_reg_write(dsc, REG_TRX_STATE, TRX_CMD_TX_START); /*17 */
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}
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void cw_test_begin(struct atrf_dsc *dsc, uint8_t cont_tx)
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{
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switch (atrf_identify(dsc)) {
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case artf_at86rf230:
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enter_test_mode_230(dsc, cont_tx);
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break;
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case artf_at86rf231:
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enter_test_mode_231(dsc, cont_tx);
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break;
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default:
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abort();
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}
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}
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void cw_test_end(struct atrf_dsc *dsc)
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{
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if (atrf_identify(dsc) == artf_at86rf231)
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atrf_reg_write(dsc, REG_PART_NUM, 0);
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atrf_reset_rf(dsc);
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}
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