ben-wpan/atusd/atusd.cmp

Cmp-Mod V01 Created by CvPCB (2010-12-27 BZR 2685)-unstable date = Tue Jan  4 02:41:25 2011

BeginCmp
TimeStamp = /4C63FE17;
Reference = ANT1;
ValeurCmp = 50R;
IdModule  = MEANDER-110;
EndCmp

BeginCmp
TimeStamp = /4D22A4C6;
Reference = B1;
ValeurCmp = 2450FB15L0001;
IdModule  = 0805-6;
EndCmp

BeginCmp
TimeStamp = /4C7FBF1B;
Reference = C1;
ValeurCmp = 22pF/RF;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4C7FBF1E;
Reference = C2;
ValeurCmp = 22pF/RF;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4C640A76;
Reference = C3;
ValeurCmp = 1uF;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4C641004;
Reference = C4;
ValeurCmp = 1uF;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4C640A84;
Reference = C5;
ValeurCmp = 1uF;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4C640A7E;
Reference = C6;
ValeurCmp = 1uF;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4C7FBD45;
Reference = C7;
ValeurCmp = 33pF;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4C8BDEB3;
Reference = C8;
ValeurCmp = 220pF;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4D22A5A9;
Reference = C9;
ValeurCmp = 22pF/RF;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C640CD5;
Reference = P1;
ValeurCmp = TST;
IdModule  = PAD_60x60;
EndCmp

BeginCmp
TimeStamp = /4C7FB8B3;
Reference = P2;
ValeurCmp = CONN_8;
IdModule  = uSD-Card;
EndCmp

BeginCmp
TimeStamp = /4C7FBDBD;
Reference = R1;
ValeurCmp = 0R;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4C8C121C;
Reference = R2;
ValeurCmp = 0R;
IdModule  = 0402-M;
EndCmp

BeginCmp
TimeStamp = /4D22A108;
Reference = U1;
ValeurCmp = AT86RF231;
IdModule  = QFN32;
EndCmp

EndListe
atusd.brd: use 110% antenna; better follow 8:10 card shape - atusd.pro: changed ../modules/meander to ../ants/meander - atusd.cmp: changed ANT1 footprint from "meander" to "MEANDER-110" - atusd.brd: updated antenna, board outline, and dimensions - atusd.brd: made board outline follow 8:10 card shape more accurately 2011-01-04 08:04:38 +02:00			`Cmp-Mod V01 Created by CvPCB (2010-12-27 BZR 2685)-unstable date = Tue Jan 4 02:41:25 2011`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00
			`BeginCmp`
			`TimeStamp = /4C63FE17;`
			`Reference = ANT1;`
			`ValeurCmp = 50R;`
atusd.brd: use 110% antenna; better follow 8:10 card shape - atusd.pro: changed ../modules/meander to ../ants/meander - atusd.cmp: changed ANT1 footprint from "meander" to "MEANDER-110" - atusd.brd: updated antenna, board outline, and dimensions - atusd.brd: made board outline follow 8:10 card shape more accurately 2011-01-04 08:04:38 +02:00			`IdModule = MEANDER-110;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`EndCmp`

			`BeginCmp`
atusd.brd: use 110% antenna; better follow 8:10 card shape - atusd.pro: changed ../modules/meander to ../ants/meander - atusd.cmp: changed ANT1 footprint from "meander" to "MEANDER-110" - atusd.brd: updated antenna, board outline, and dimensions - atusd.brd: made board outline follow 8:10 card shape more accurately 2011-01-04 08:04:38 +02:00			`TimeStamp = /4D22A4C6;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`Reference = B1;`
atusd.brd: use 110% antenna; better follow 8:10 card shape - atusd.pro: changed ../modules/meander to ../ants/meander - atusd.cmp: changed ANT1 footprint from "meander" to "MEANDER-110" - atusd.brd: updated antenna, board outline, and dimensions - atusd.brd: made board outline follow 8:10 card shape more accurately 2011-01-04 08:04:38 +02:00			`ValeurCmp = 2450FB15L0001;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`IdModule = 0805-6;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C7FBF1B;`
			`Reference = C1;`
atusd.brd: use 110% antenna; better follow 8:10 card shape - atusd.pro: changed ../modules/meander to ../ants/meander - atusd.cmp: changed ANT1 footprint from "meander" to "MEANDER-110" - atusd.brd: updated antenna, board outline, and dimensions - atusd.brd: made board outline follow 8:10 card shape more accurately 2011-01-04 08:04:38 +02:00			`ValeurCmp = 22pF/RF;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`IdModule = 0402-M;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C7FBF1E;`
			`Reference = C2;`
atusd.brd: use 110% antenna; better follow 8:10 card shape - atusd.pro: changed ../modules/meander to ../ants/meander - atusd.cmp: changed ANT1 footprint from "meander" to "MEANDER-110" - atusd.brd: updated antenna, board outline, and dimensions - atusd.brd: made board outline follow 8:10 card shape more accurately 2011-01-04 08:04:38 +02:00			`ValeurCmp = 22pF/RF;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`IdModule = 0402-M;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C640A76;`
			`Reference = C3;`
			`ValeurCmp = 1uF;`
			`IdModule = 0402-M;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C641004;`
			`Reference = C4;`
			`ValeurCmp = 1uF;`
			`IdModule = 0402-M;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C640A84;`
			`Reference = C5;`
			`ValeurCmp = 1uF;`
			`IdModule = 0402-M;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C640A7E;`
			`Reference = C6;`
			`ValeurCmp = 1uF;`
			`IdModule = 0402-M;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C7FBD45;`
			`Reference = C7;`
Applied clock voltage divider fix and corrected too closely spaced via. - atusd/atusd.sch, atusd/atusd.cmp, atusd/atusd.brd: changed resistive clock voltage divider to capacitative - atusd/atusd.brd: moved via near pin 1 and rearranged ground planes accordingly - atusd/atusd.sch, atusd/atusd.brd: bumped version number to 20100911 - atusd/atusd.pro: KiCad commit noise 2010-09-11 23:08:25 +03:00			`ValeurCmp = 33pF;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`IdModule = 0402-M;`
			`EndCmp`

Applied clock voltage divider fix and corrected too closely spaced via. - atusd/atusd.sch, atusd/atusd.cmp, atusd/atusd.brd: changed resistive clock voltage divider to capacitative - atusd/atusd.brd: moved via near pin 1 and rearranged ground planes accordingly - atusd/atusd.sch, atusd/atusd.brd: bumped version number to 20100911 - atusd/atusd.pro: KiCad commit noise 2010-09-11 23:08:25 +03:00			`BeginCmp`
			`TimeStamp = /4C8BDEB3;`
			`Reference = C8;`
			`ValeurCmp = 220pF;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`IdModule = 0402-M;`
			`EndCmp`

atusd.brd: use 110% antenna; better follow 8:10 card shape - atusd.pro: changed ../modules/meander to ../ants/meander - atusd.cmp: changed ANT1 footprint from "meander" to "MEANDER-110" - atusd.brd: updated antenna, board outline, and dimensions - atusd.brd: made board outline follow 8:10 card shape more accurately 2011-01-04 08:04:38 +02:00			`BeginCmp`
			`TimeStamp = /4D22A5A9;`
			`Reference = C9;`
			`ValeurCmp = 22pF/RF;`
			`IdModule = 0402;`
			`EndCmp`

atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`BeginCmp`
			`TimeStamp = /4C640CD5;`
			`Reference = P1;`
			`ValeurCmp = TST;`
			`IdModule = PAD_60x60;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C7FB8B3;`
			`Reference = P2;`
			`ValeurCmp = CONN_8;`
			`IdModule = uSD-Card;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C7FBDBD;`
Applied clock voltage divider fix and corrected too closely spaced via. - atusd/atusd.sch, atusd/atusd.cmp, atusd/atusd.brd: changed resistive clock voltage divider to capacitative - atusd/atusd.brd: moved via near pin 1 and rearranged ground planes accordingly - atusd/atusd.sch, atusd/atusd.brd: bumped version number to 20100911 - atusd/atusd.pro: KiCad commit noise 2010-09-11 23:08:25 +03:00			`Reference = R1;`
			`ValeurCmp = 0R;`
Corrected small footprint errors. Made 0R "inductor" a resistor. - atusd/atusd.sch, atusd/atusd.cmp, atusd/atusd.brd: made L1 a resistor - atusd/atusd.sch, atusd/atusd.cmp, atusd/atusd.brd: changed effective footprints of components erroneously using 0805 to 0805-M - atusd/atusd.pro: commit noise 2010-09-12 06:27:10 +03:00			`IdModule = 0402-M;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C8C121C;`
			`Reference = R2;`
			`ValeurCmp = 0R;`
			`IdModule = 0402-M;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`EndCmp`

			`BeginCmp`
atusd.brd: use 110% antenna; better follow 8:10 card shape - atusd.pro: changed ../modules/meander to ../ants/meander - atusd.cmp: changed ANT1 footprint from "meander" to "MEANDER-110" - atusd.brd: updated antenna, board outline, and dimensions - atusd.brd: made board outline follow 8:10 card shape more accurately 2011-01-04 08:04:38 +02:00			`TimeStamp = /4D22A108;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`Reference = U1;`
atusd.brd: use 110% antenna; better follow 8:10 card shape - atusd.pro: changed ../modules/meander to ../ants/meander - atusd.cmp: changed ANT1 footprint from "meander" to "MEANDER-110" - atusd.brd: updated antenna, board outline, and dimensions - atusd.brd: made board outline follow 8:10 card shape more accurately 2011-01-04 08:04:38 +02:00			`ValeurCmp = AT86RF231;`
atusd/: first try at a uSD-based board. Improved RF design. 2010-09-03 05:02:46 +03:00			`IdModule = QFN32;`
			`EndCmp`

			`EndListe`