ben-wpan/atusd/tools/Makefile

CC=mipsel-openwrt-linux-gcc
CFLAGS=-Wall -I../../atrf/fw/include

MAIN = try
OBJS = $(MAIN).c lib/atusd.o

$(MAIN):	$(OBJS)
First part of the board bringup: power and clock. - atusd/ERRATA: variations of the circuit being debugged from the design - tools/Makefile, tools/try.c, tools/lib/atusd.c: user-space tool to enable the board and (in the future) establish communication - atusd/sim/clk.sch: simulation of CLK attenuation circuit with capacitative load from scope probe 2010-09-05 05:14:57 +03:00			`CC=mipsel-openwrt-linux-gcc`
Board bringup: talk to the chip and read IDs. - atusd/ERRATA: mention that the reset circuit can go, as expected - atusd/tools/Makefile: add include path to at86rf230.h - atusd/tools/lib/atusd.c: include atusd.h, for consistency checking - atusd/tools/lib/atusd.c (spi_begin, spi_end, spi_data_in, spi_data_out, spi_send_partial, spi_recv, spi_finish, spi_send): low-level functions to access our modified SPI - atusd/tools/lib/atusd.h, atusd/tools/lib/atusd.c (atusd_reg_write, atusd_reg_read): register read and write access - atusd/tools/try.c: read and print chip IDs 2010-09-05 22:59:59 +03:00			`CFLAGS=-Wall -I../../atrf/fw/include`
First part of the board bringup: power and clock. - atusd/ERRATA: variations of the circuit being debugged from the design - tools/Makefile, tools/try.c, tools/lib/atusd.c: user-space tool to enable the board and (in the future) establish communication - atusd/sim/clk.sch: simulation of CLK attenuation circuit with capacitative load from scope probe 2010-09-05 05:14:57 +03:00
			`MAIN = try`
			`OBJS = $(MAIN).c lib/atusd.o`

			`$(MAIN): $(OBJS)`