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git://projects.qi-hardware.com/ben-wpan.git
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128 lines
3.1 KiB
Python
128 lines
3.1 KiB
Python
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#!/usr/bin/python
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from tmc.wave import *
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from tmc.dxplore import dxplore
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from tmc.decode import d_usb_stream
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#
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# Clock recovery: we assume that each change in the wave is triggered by a
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# clock edge. We know the clock's nominal period and resynchronize on each
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# edge. Additionally, we can obtain a list of times when a timing violation
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# has occurred.
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#
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# Note that the timing violations logic doesn't make much sense in its present
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# form, since it mainly measures noise (particularly if we're digitizing slow
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# edges) and not clock drift.
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#
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# A more useful metric would be accumulated error from some point of reference
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# or at least the timing of same edges, to eliminate (generally harmless) time
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# offsets introduced by digitizing.
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#
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# So it would probably make more sense for "recover" not to check for timing
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# violations at all, and leave this to more specialized functions.
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#
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def recover(self, period, min = None, max = None, t0 = None):
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if t0 is None:
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t0 = self.data[0]
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v = not self.initial
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res = []
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violations = []
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for t in self.data:
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v = not v
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if t <= t0:
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continue
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n = 0
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while t0 < t-period/2:
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res.append(t0)
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t0 += period
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n += 1
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if min is not None:
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if t0-t > n*min:
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violations.append(t)
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if max is not None:
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if t-t0 > n*max:
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violations.append(t)
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t0 = t
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return res, violations
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#
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# Load the analog waves saved by get.py
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#
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wv = waves()
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wv.load("_wv")
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#
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# Digitize the waves and save the result.
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#
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dp = wv[0].digitize(1.5, 1.8)
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dm = wv[1].digitize(1.5, 1.8)
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wv = waves(dp, dm, dp-dm)
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wv.save("_dig")
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#
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# Also record the differential signal.
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#
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wd = wv[1]-wv[0]
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dd = wd.digitize(-0.5, 0.5)
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wd.save("_diff")
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#
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# Run clock recovery on D+/D-. We only need one, but check both to be sure.
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#
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#p = 1/1.5e6
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p = 1/12e6
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dp_t, viol = recover(dp, p, p*0.9, p*1.1)
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print viol
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dm_t, viol = recover(dm, p, p*.9, p*1.1, t0 = dp.data[0])
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print viol
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#
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# Shift the clock by half a period, add a few periods to get steady state and
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# SE0s (if any), and then sample the data lines.
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#
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clk = map(lambda t: t+p/2, dp_t)
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clk.extend((clk[-1]+p, clk[-1]+2*p, clk[-1]+3*p))
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dp_bv = dp.get(clk)
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dm_bv = dm.get(clk)
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#
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# Save a wave with the recovered clock to make it easier to find the bits in
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# analog graphs.
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#
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dd.data = dp_t;
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dd.save("_clk")
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#
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# For decoding, we need a fake bit clock. We generate it by doubling each data
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# bit and generating a L->H transition during this bit.
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#
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dpd = []
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dmd = []
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dck = []
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# err, silly, seems that we've mixed up D+ and D- all over the place :-)
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print d_usb_stream(dm_bv[:], dp_bv[:])
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for v in dp_bv:
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dpd.append(v)
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dpd.append(v)
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dck.append(0)
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dck.append(1)
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for v in dm_bv:
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dmd.append(v)
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dmd.append(v)
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#
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# Display the reconstructed digital signal. Note that the absolute time is only
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# correct at the beginning and that relative time is only accurate over
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# intervals in which no significant clock resynchronization has occurred.
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#
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# In fact, dxplore should probably have an option to either turn off time
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# entirely or to display a user-provided time axis. The latter may be a bit
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# tricky to implement.
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#
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dxplore((dmd, dpd, dck), 0, p/2, labels = ("D+", "D-", "CLK"))
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