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synced 2024-11-04 23:23:43 +02:00
atben, atusb: always invoke KiCAD with absolute paths lest .pro be ignored
- atben/Makefile, atusb/Makefile (SCH, BRD): abstract path to .sch and .brd via variables - atben/Makefile, atusb/Makefile (gerber, fab): pass absolute path to board file to pcbnew - atben/Makefile, atusb/Makefile (gerber): put all options before the file name argument
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f17bcebce7
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@ -6,6 +6,9 @@ NAME = atben
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VERSION = 110314
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VERSION = 110314
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DIR = $(NAME)
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DIR = $(NAME)
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SCH=$(shell pwd)/$(NAME).sch
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BRD=$(shell pwd)/$(NAME).brd
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.PHONY: all gen generate sch brd xpdf front back clean
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.PHONY: all gen generate sch brd xpdf front back clean
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.PHONY: gerber gerbv
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.PHONY: gerber gerbv
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@ -14,14 +17,14 @@ all:
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@exit 1
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@exit 1
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gen generate:
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gen generate:
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eeschema --plot=ps `pwd`/$(NAME).sch
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eeschema --plot=ps $(SCH)
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# need scripts
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# need scripts
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sch:
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sch:
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eeschema `pwd`/$(NAME).sch
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eeschema $(SCH)
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brd:
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brd:
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pcbnew `pwd`/$(NAME).brd
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pcbnew $(BRD)
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xpdf:
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xpdf:
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xpdf $(NAME).pdf
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xpdf $(NAME).pdf
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@ -46,16 +49,16 @@ PCB_FILES = README-PCB $(NAME)-PCB_Edges.dxf $(NAME).drl \
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gerber:
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gerber:
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pcbnew --plot=gerber --origin=aux \
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pcbnew --plot=gerber --origin=aux \
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-l `pcbnew --list-layers $(NAME).brd | tr '\012' ,` \
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-l `pcbnew --list-layers $(BRD) | tr '\012' ,` \
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--fill-all-zones $(NAME).brd \
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--fill-all-zones --exclude-pcb-edge \
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--exclude-pcb-edge
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$(BRD)
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$(GMERGE) $(NAME)-SilkS_Front.gto $(NAME)-Comments.gbr >_tmp \
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$(GMERGE) $(NAME)-SilkS_Front.gto $(NAME)-Comments.gbr >_tmp \
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|| { rm -rf _tmp; exit 1; }
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|| { rm -rf _tmp; exit 1; }
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mv _tmp $(NAME)-SilkS_Front.gto
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mv _tmp $(NAME)-SilkS_Front.gto
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fab: gerber
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fab: gerber
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pcbnew --plot=dxf --origin=aux -l PCB_Edges $(NAME).brd
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pcbnew --plot=dxf --origin=aux -l PCB_Edges $(BRD)
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pcbnew --drill --origin=aux $(NAME).brd
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pcbnew --drill --origin=aux $(BRD)
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mkdir -p fab
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mkdir -p fab
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tar Ccfz .. fab/$(NAME)-pcb-$(VERSION).tar.gz \
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tar Ccfz .. fab/$(NAME)-pcb-$(VERSION).tar.gz \
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$(PCB_FILES:%=$(DIR)/%)
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$(PCB_FILES:%=$(DIR)/%)
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@ -6,6 +6,9 @@ NAME = atusb
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VERSION = 110314
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VERSION = 110314
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DIR = $(NAME)
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DIR = $(NAME)
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SCH=$(shell pwd)/$(NAME).sch
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BRD=$(shell pwd)/$(NAME).brd
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.PHONY: all gen generate sch brd xpdf front back clean
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.PHONY: all gen generate sch brd xpdf front back clean
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.PHONY: gerber gerbv fab
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.PHONY: gerber gerbv fab
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@ -14,14 +17,14 @@ all:
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@exit 1
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@exit 1
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gen generate:
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gen generate:
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eeschema --plot=ps `pwd`/$(NAME).sch
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eeschema --plot=ps $(SCH)
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# need scripts
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# need scripts
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sch:
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sch:
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eeschema `pwd`/$(NAME).sch
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eeschema $(SCH)
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brd:
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brd:
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pcbnew `pwd`/$(NAME).brd
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pcbnew $(BRD)
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xpdf:
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xpdf:
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xpdf $(NAME).pdf
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xpdf $(NAME).pdf
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@ -63,16 +66,16 @@ PCB_FILES = README-PCB $(NAME)-PCB_Edges.dxf $(NAME).drl \
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gerber:
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gerber:
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pcbnew --plot=gerber --origin=aux \
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pcbnew --plot=gerber --origin=aux \
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-l `pcbnew --list-layers $(NAME).brd | tr '\012' ,` \
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-l `pcbnew --list-layers $(BRD) | tr '\012' ,` \
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--fill-all-zones $(NAME).brd \
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--fill-all-zones --exclude-pcb-edge \
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--exclude-pcb-edge
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$(BRD)
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$(GMERGE) $(NAME)-SilkS_Front.gto $(NAME)-Comments.gbr >_tmp \
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$(GMERGE) $(NAME)-SilkS_Front.gto $(NAME)-Comments.gbr >_tmp \
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|| { rm -rf _tmp; exit 1; }
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|| { rm -rf _tmp; exit 1; }
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mv _tmp $(NAME)-SilkS_Front.gto
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mv _tmp $(NAME)-SilkS_Front.gto
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fab: gerber
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fab: gerber
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pcbnew --plot=dxf --origin=aux -l PCB_Edges $(NAME).brd
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pcbnew --plot=dxf --origin=aux -l PCB_Edges $(BRD)
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pcbnew --drill --origin=aux $(NAME).brd
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pcbnew --drill --origin=aux $(BRD)
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mkdir -p fab
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mkdir -p fab
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tar Ccfz .. fab/$(NAME)-pcb-$(VERSION).tar.gz \
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tar Ccfz .. fab/$(NAME)-pcb-$(VERSION).tar.gz \
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$(PCB_FILES:%=$(DIR)/%)
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$(PCB_FILES:%=$(DIR)/%)
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