qi-hardware/ben-wpan
1
0
Fork 0
mirror of git://projects.qi-hardware.com/ben-wpan.git synced 2024-11-26 10:17:11 +02:00
Code

atben, atusb: always invoke KiCAD with absolute paths lest .pro be ignored

Browse Source 
- atben/Makefile, atusb/Makefile (SCH, BRD): abstract path to .sch and
  .brd via variables
- atben/Makefile, atusb/Makefile (gerber, fab): pass absolute path to
  board file to pcbnew
- atben/Makefile, atusb/Makefile (gerber): put all options before the
  file name argument
This commit is contained in:
Werner Almesberger 2011-03-22 02:21:26 -03:00
parent f17bcebce7
commit 18b2b919dc
2 changed files with 22 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
atben/Makefile
View File

@ -6,6 +6,9 @@ NAME = atben
VERSION = 110314
DIR = $(NAME)
SCH=$(shell pwd)/$(NAME).sch
BRD=$(shell pwd)/$(NAME).brd
.PHONY: all gen generate sch brd xpdf front back clean
.PHONY: gerber gerbv
@ -14,14 +17,14 @@ all:
@exit 1
gen generate:
eeschema --plot=ps `pwd`/$(NAME).sch
eeschema --plot=ps $(SCH)
# need scripts
sch:
eeschema `pwd`/$(NAME).sch
eeschema $(SCH)
brd:
pcbnew `pwd`/$(NAME).brd
pcbnew $(BRD)
xpdf:
xpdf $(NAME).pdf
@ -46,16 +49,16 @@ PCB_FILES = README-PCB $(NAME)-PCB_Edges.dxf $(NAME).drl \
gerber:
pcbnew --plot=gerber --origin=aux \
-l `pcbnew --list-layers $(NAME).brd | tr '\012' ,` \
--fill-all-zones $(NAME).brd \
--exclude-pcb-edge
-l `pcbnew --list-layers $(BRD) | tr '\012' ,` \
--fill-all-zones --exclude-pcb-edge \
$(BRD)
$(GMERGE) $(NAME)-SilkS_Front.gto $(NAME)-Comments.gbr >_tmp \
|| { rm -rf _tmp; exit 1; }
mv _tmp $(NAME)-SilkS_Front.gto
fab: gerber
pcbnew --plot=dxf --origin=aux -l PCB_Edges $(NAME).brd
pcbnew --drill --origin=aux $(NAME).brd
pcbnew --plot=dxf --origin=aux -l PCB_Edges $(BRD)
pcbnew --drill --origin=aux $(BRD)
mkdir -p fab
tar Ccfz .. fab/$(NAME)-pcb-$(VERSION).tar.gz \
$(PCB_FILES:%=$(DIR)/%)

19
atusb/Makefile
View File

@ -6,6 +6,9 @@ NAME = atusb
VERSION = 110314
DIR = $(NAME)
SCH=$(shell pwd)/$(NAME).sch
BRD=$(shell pwd)/$(NAME).brd
.PHONY: all gen generate sch brd xpdf front back clean
.PHONY: gerber gerbv fab
@ -14,14 +17,14 @@ all:
@exit 1
gen generate:
eeschema --plot=ps `pwd`/$(NAME).sch
eeschema --plot=ps $(SCH)
# need scripts
sch:
eeschema `pwd`/$(NAME).sch
eeschema $(SCH)
brd:
pcbnew `pwd`/$(NAME).brd
pcbnew $(BRD)
xpdf:
xpdf $(NAME).pdf
@ -63,16 +66,16 @@ PCB_FILES = README-PCB $(NAME)-PCB_Edges.dxf $(NAME).drl \
gerber:
pcbnew --plot=gerber --origin=aux \
-l `pcbnew --list-layers $(NAME).brd | tr '\012' ,` \
--fill-all-zones $(NAME).brd \
--exclude-pcb-edge
-l `pcbnew --list-layers $(BRD) | tr '\012' ,` \
--fill-all-zones --exclude-pcb-edge \
$(BRD)
$(GMERGE) $(NAME)-SilkS_Front.gto $(NAME)-Comments.gbr >_tmp \
|| { rm -rf _tmp; exit 1; }
mv _tmp $(NAME)-SilkS_Front.gto
fab: gerber
pcbnew --plot=dxf --origin=aux -l PCB_Edges $(NAME).brd
pcbnew --drill --origin=aux $(NAME).brd
pcbnew --plot=dxf --origin=aux -l PCB_Edges $(BRD)
pcbnew --drill --origin=aux $(BRD)
mkdir -p fab
tar Ccfz .. fab/$(NAME)-pcb-$(VERSION).tar.gz \
$(PCB_FILES:%=$(DIR)/%)