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atusb/fw2: firmware for the AVR-based atusb (in progress)

Browse Source 
- ./: basic framework to build a firmware that can enumerate
- usb/patches/: patches to make FreakUSB 0.7 compile cleanly and to make
  it work in our context
This commit is contained in:
Werner Almesberger 2011-02-08 19:32:15 -03:00
parent bb2894f293
commit 259400fdb8
9 changed files with 906 additions and 0 deletions
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53
atusb/fw2/Makefile Normal file
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@ -0,0 +1,53 @@
NAME = atusb
CFLAGS = -g -Wall -Wextra -Wshadow -Werror -Wno-unused \
-Wmissing-prototypes -Wmissing-declarations -Wstrict-prototypes
CHIP=atmega32u2
CHIP_AVRDUDE=at90usb162 # @@@ fix this when support for the ATmega32U2 becomes
# available
AVR_PREFIX = $(BIN_PATH) avr-
CC = $(AVR_PREFIX)gcc
OBJCOPY = $(AVR_PREFIX)objcopy
#OBJDUMP = $(AVR_PREFIX)objdump
FreakUSB = usb
USB_OBJS = $(FreakUSB)/usb/usb.o $(FreakUSB)/usb/ctrl.o \
$(FreakUSB)/usb/usb_buf.o \
$(FreakUSB)/hw/at90usbxx2/ep.o $(FreakUSB)/hw/at90usbxx2/hw.o \
$(FreakUSB)/hw/at90usbxx2/isr.o
OBJS = atusb.o descr.o $(USB_OBJS)
CFLAGS += -I../fw/include \
-I$(FreakUSB)/usb -I$(FreakUSB)/hw/at90usbxx2 \
-DNUM_EPS=1
.PHONY: all clean upload prog
all: $(NAME).bin
%.o: %.c
$(CC) $(CFLAGS) -mmcu=$(CHIP) -Os -c $<
$(NAME).elf: $(OBJS)
$(CC) $(CFLAGS) -mmcu=$(CHIP) -o $@ $(notdir $(OBJS))
%.bin: %.elf
$(OBJCOPY) -j .text -j .data -O binary $< $@
clean:
rm -f $(NAME).bin $(NAME).elf $(notdir $(OBJS))
upload: $(NAME).bin
scp $(NAME).bin jlime:
prog:
ssh jlime avrdude -F -p $(CHIP_AVRDUDE) -c nanonote_atusb -e \
-U flash:w:$(NAME).bin:r \
-U lfuse:w:0x60:m # external clock, slow start-up
on:
ssh jlime poke 0x10010318 4
off:
ssh jlime poke 0x10010314 4

10
atusb/fw2/README Normal file
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@ -0,0 +1,10 @@
cd usb
wget http://freaklabs.org/freakusb/FreakUSB%20v0.70.zip
unzip -a FreakUSB?v0.70.zip
quilt push -a
cd ..
make
make upload prog

99
atusb/fw2/atusb.c Normal file
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@ -0,0 +1,99 @@
#include <stdint.h>
#include <avr/io.h>
#define F_CPU 8000000UL
#include <util/delay.h>
#include "freakusb.h"
#include "io.h"
#include "at86rf230.h"
static void spi_begin(void)
{
CLR(nSS);
}
static uint8_t spi(uint8_t v)
{
// while (!(UCSR1A & 1 << UDRE1));
UDR1 = v;
while (!(UCSR1A & 1 << RXC1));
return UDR1;
}
static void spi_end(void)
{
// while (!(UCSR1A & 1 << TXC1));
SET(nSS);
}
int main(void)
{
/* We start with a 1 MHz/8 clock. Disable the prescaler. */
CLKPR = 1 << CLKPCE;
CLKPR = 0;
/* set up all the outputs; default port value is 0 */
OUT(LED);
OUT(nRST_RF); /* reset the transceiver */
OUT(SLP_TR);
OUT(SCLK);
OUT(MOSI);
OUT(nSS);
/* set up UART-SPI */
UCSR1C = 1 << UMSEL11 | 1 << UMSEL10;
/* set MSPI, MSB first, SPI data mode 0 */
UCSR1B = 1 << RXEN1 | 1 << TXEN1;
/* enable receiver and transmitter */
UBRR1 = 0; /* reconfirm the bit rate */
/* bring the transceiver out of reset */
/*
* AT86RF231 data sheet, 12.4.13, reset pulse with: 625 ns (min).
* We spend a lot more time getting here, so no extra wait is needed.
*/
SET(nRST_RF);
/*
* 12.4.14: SPI access latency after reset: 625 ns
*/
_delay_us(1);
/* switch CLKM to 8 MHz */
/*
* @@@ Note: Atmel advise against changing the external clock in
* mid-flight. We should therefore switch to the RC clock first, then
* crank up the external clock, and finally switch back to the external
* clock. The clock switching procedure is described in the ATmega32U2
* data sheet in secton 8.2.2.
*/
spi_begin();
spi(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
spi(CLKM_CTRL_8MHz);
spi_end();
/* now we should be at 8 MHz */
SET(LED);
_delay_ms(100);
CLR(LED);
usb_init();
hw_init();
while (1)
usb_poll();
}

159
atusb/fw2/descr.c Normal file
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@ -0,0 +1,159 @@
/*
* atspi/descr.c - USB descriptors
*
* Written 2008-2011 by Werner Almesberger
* Copyright 2008-2011 Werner Almesberger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include "freakusb.h"
#include <avr/pgmspace.h>
#if 0
/* f32xbase/fw/common/usb.h */
#define USB_DT_DEVICE 1
#define USB_DT_CONFIG 2
#define USB_DT_STRING 3
#define USB_DT_INTERFACE 4
#define USB_DT_ENDPOINT 5
#endif
#define USB_CLASS_VENDOR_SPEC 0xff
#define USB_ATTR_BUS_POWERED 0x80
#define USB_DT_DEVICE DEV_DESCR
#define USB_DT_CONFIG CFG_DESCR
#define USB_DT_INTERFACE INTF_DESCR
#define USB_DT_ENDPOINT EP_DESCR
#define EP0_SIZE MAX_BUF_SZ
#define EP1_SIZE MAX_BUF_SZ
#define USB_VENDOR 0x20b7 /* Qi Hardware */
#define USB_PRODUCT 0x1540 /* ben-wpan atusb */
#define LE(x) ((uint16_t) (x) & 0xff), ((uint16_t) (x) >> 8)
/*
* Device descriptor
*/
uint8_t device_descriptor[18] PROGMEM = {
18, /* bLength */
USB_DT_DEVICE, /* bDescriptorType */
LE(0x200), /* bcdUSB */
USB_CLASS_VENDOR_SPEC, /* bDeviceClass */
0x00, /* bDeviceSubClass */
0x00, /* bDeviceProtocol */
EP0_SIZE, /* bMaxPacketSize */
LE(USB_VENDOR), /* idVendor */
LE(USB_PRODUCT), /* idProduct */
LE(0x0001), /* bcdDevice */
0, /* iManufacturer */
0, /* iProduct */
0, /* iSerialNumber */
1 /* bNumConfigurations */
};
/*
* Our configuration
*
* We're always bus-powered.
*/
uint8_t config_descriptor[] PROGMEM = {
9, /* bLength */
USB_DT_CONFIG, /* bDescriptorType */
#if 0
LE(9+9+7+7), /* wTotalLength */
#else
LE(9+9), /* wTotalLength */
#endif
1, /* bNumInterfaces */
1, /* bConfigurationValue (> 0 !) */
0, /* iConfiguration */
USB_ATTR_BUS_POWERED, /* bmAttributes */
50/2, /* bMaxPower (50 mA) */
/* Interface #0 */
9, /* bLength */
USB_DT_INTERFACE, /* bDescriptorType */
0, /* bInterfaceNumber */
0, /* bAlternateSetting */
#if 0
2, /* bNumEndpoints */
#else
0,
#endif
USB_CLASS_VENDOR_SPEC, /* bInterfaceClass */
0, /* bInterfaceSubClass */
0, /* bInterfaceProtocol */
0, /* iInterface */
#if 0
/* EP OUT */
7, /* bLength */
USB_DT_ENDPOINT, /* bDescriptorType */
0x01, /* bEndPointAddress */
0x02, /* bmAttributes (bulk) */
LE(EP1_SIZE), /* wMaxPacketSize */
0, /* bInterval */
/* EP IN */
7, /* bLength */
USB_DT_ENDPOINT, /* bDescriptorType */
0x81, /* bEndPointAddress */
0x02, /* bmAttributes (bulk) */
LE(EP1_SIZE), /* wMaxPacketSize */
0, /* bInterval */
#endif
};
#define dev_desc device_descriptor
#define cfg_desc config_descriptor
U8 *desc_dev_get()
{
return dev_desc;
}
U8 desc_dev_get_len()
{
return pgm_read_byte(dev_desc);
}
U8 *desc_cfg_get()
{
return cfg_desc;
}
U8 desc_cfg_get_len()
{
return pgm_read_byte(cfg_desc + 2);
}
U8 *desc_dev_qual_get()
{
return NULL;
}
U8 desc_dev_qual_get_len()
{
return 0;
}
U8 *desc_str_get(U8 index)
{
return NULL;
}
U8 desc_str_get_len(U8 index)
{
return 0;
}

39
atusb/fw2/io.h Normal file
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@ -0,0 +1,39 @@
#ifndef IO_H
#define IO_H
#define LED_PORT B
#define LED_BIT 6
#define nRST_RF_PORT C
#define nRST_RF_BIT 7
#define SLP_TR_PORT B
#define SLP_TR_BIT 4
#define SCLK_PORT D
#define SCLK_BIT 5
#define MOSI_PORT D
#define MOSI_BIT 3
#define MISO_PORT D
#define MISO_BIT 2
#define nSS_PORT D
#define nSS_BIT 1
#define IRQ_RF_PORT D
#define IRQ_RF_BIT 0
#define SET_2(p, b) PORT##p |= 1 << (b)
#define CLR_2(p, b) PORT##p &= ~(1 << (b))
#define IN_2(p, b) DDR##p &= ~(1 << (b))
#define OUT_2(p, b) DDR##p |= 1 << (b)
#define SET_1(p, b) SET_2(p, b)
#define CLR_1(p, b) CLR_2(p, b)
#define IN_1(p, b) IN_2(p, b)
#define OUT_1(p, b) OUT_2(p, b)
#define SET(n) SET_1(n##_PORT, n##_BIT)
#define CLR(n) CLR_1(n##_PORT, n##_BIT)
#define IN(n) IN_1(n##_PORT, n##_BIT)
#define OUT(n) OUT_1(n##_PORT, n##_BIT)
#endif /* !IO_H */

408
atusb/fw2/usb/patches/cleanup.patch Normal file
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@ -0,0 +1,408 @@
Index: fw4/hw/at90usbxx2/ep.c
===================================================================
--- fw4.orig/hw/at90usbxx2/ep.c 2011-02-08 17:13:41.000000000 -0300
+++ fw4/hw/at90usbxx2/ep.c 2011-02-08 17:13:46.000000000 -0300
@@ -56,7 +56,7 @@
Get the max packet size of the endpoint.
*/
/**************************************************************************/
-U8 ep_size_get()
+static U8 ep_size_get(void)
{
U8 tmp = (UECFG1X &= (7<<EPSIZE0));
tmp >>= EPSIZE0;
@@ -68,7 +68,7 @@
Get the direction of the endpoint.
*/
/**************************************************************************/
-U8 ep_dir_get()
+static U8 ep_dir_get(void)
{
return (UECFG0X & 0x1);
}
@@ -78,7 +78,7 @@
Get the endpoint type: BULK, CONTROL, INTERRUPT, ISOCHRONOUS
*/
/**************************************************************************/
-U8 ep_type_get()
+static U8 ep_type_get(void)
{
return ((UECFG0X & (0x3 << EPTYPE0)) >> EPTYPE0);
}
@@ -88,8 +88,9 @@
Clear the endpoint configuration registers
*/
/**************************************************************************/
-void ep_cfg_clear()
+static void ep_cfg_clear(U8 ep_num)
{
+ ep_select(ep_num);
UECFG0X = 0;
UECFG1X = 0;
}
@@ -99,8 +100,9 @@
Clear the specified endpoint's enable bit.
*/
/**************************************************************************/
-void ep_disable()
+static void ep_disable(U8 ep_num)
{
+ ep_select(ep_num);
UECONX &= ~(1 << EPEN);
}
@@ -279,7 +281,7 @@
Clear all endpoints and initialize ep0 for control transfers.
*/
/**************************************************************************/
-void ep_init()
+void ep_init(void)
{
U8 i;
@@ -328,7 +330,7 @@
Return the ep where an intp occurred. If no intp occurred, then return 0xff.
*/
/**************************************************************************/
-U8 ep_intp_get_num()
+U8 ep_intp_get_num(void)
{
U8 i;
@@ -348,7 +350,7 @@
is found, return 0xFF.
*/
/**************************************************************************/
-U8 ep_intp_get_src()
+U8 ep_intp_get_src(void)
{
U8 i;
Index: fw4/hw/at90usbxx2/hw.c
===================================================================
--- fw4.orig/hw/at90usbxx2/hw.c 2011-02-08 17:13:41.000000000 -0300
+++ fw4/hw/at90usbxx2/hw.c 2011-02-08 17:13:46.000000000 -0300
@@ -53,7 +53,7 @@
4) Enable the global interrupt.
*/
/**************************************************************************/
-void hw_init()
+void hw_init(void)
{
usb_pcb_t *pcb = usb_pcb_get();
@@ -126,7 +126,7 @@
Disable global interrupts
*/
/**************************************************************************/
-void hw_intp_disable()
+void hw_intp_disable(void)
{
cli();
}
@@ -136,7 +136,7 @@
Enable global interrupts
*/
/**************************************************************************/
-void hw_intp_enable()
+void hw_intp_enable(void)
{
sei();
}
Index: fw4/hw/at90usbxx2/hw.h
===================================================================
--- fw4.orig/hw/at90usbxx2/hw.h 2011-02-08 17:13:41.000000000 -0300
+++ fw4/hw/at90usbxx2/hw.h 2011-02-08 17:13:46.000000000 -0300
@@ -38,9 +38,9 @@
#ifndef HW_H
#define HW_H
-void hw_init();
-void hw_intp_disable();
-void hw_intp_enable();
+void hw_init(void);
+void hw_intp_disable(void);
+void hw_intp_enable(void);
U8 hw_flash_get_byte(U8 *addr);
#endif
Index: fw4/usb/ctrl.c
===================================================================
--- fw4.orig/usb/ctrl.c 2011-02-08 17:13:41.000000000 -0300
+++ fw4/usb/ctrl.c 2011-02-08 17:14:46.000000000 -0300
@@ -48,7 +48,7 @@
returning the relevant descriptor stored in flash.
*/
/**************************************************************************/
-void ctrl_get_desc(req_t *req)
+static void ctrl_get_desc(req_t *req)
{
U8 i = 0, desc_len = 0, desc_type, desc_idx;
U8 *desc = NULL;
@@ -117,7 +117,7 @@
Return the device configuration number to the host.
*/
/**************************************************************************/
-void ctrl_get_config()
+static void ctrl_get_config(void)
{
usb_pcb_t *pcb = usb_pcb_get();
@@ -130,7 +130,7 @@
Return the status of the device or endpoint to the host.
*/
/**************************************************************************/
-void ctrl_get_status(req_t *req)
+static void ctrl_get_status(req_t *req)
{
U8 i, rem_wake_enb = 0;
U8 status[2];
@@ -174,7 +174,7 @@
which will setup the endpoints according to the device class.
*/
/**************************************************************************/
-void ctrl_set_config(req_t *req)
+static void ctrl_set_config(req_t *req)
{
usb_pcb_t *pcb;
@@ -201,7 +201,7 @@
stall the specified endpoint.
*/
/**************************************************************************/
-void ctrl_set_feat(req_t *req)
+static void ctrl_set_feat(req_t *req)
{
usb_pcb_t *pcb = usb_pcb_get();
@@ -230,7 +230,7 @@
don't do anything with the flag.
*/
/**************************************************************************/
-void ctrl_clear_feat(req_t *req)
+static void ctrl_clear_feat(req_t *req)
{
usb_pcb_t *pcb = usb_pcb_get();
@@ -261,7 +261,7 @@
then we'll stall the endpoint.
*/
/**************************************************************************/
-void ctrl_handler()
+void ctrl_handler(void)
{
usb_pcb_t *pcb = usb_pcb_get();
U8 i, req[CTRL_IN_REQ_SZ];
Index: fw4/usb/freakusb.h
===================================================================
--- fw4.orig/usb/freakusb.h 2011-02-08 17:13:41.000000000 -0300
+++ fw4/usb/freakusb.h 2011-02-08 17:13:46.000000000 -0300
@@ -213,35 +213,35 @@
U8 pending_data;
U8 test;
usb_buffer_t fifo[NUM_EPS];
- void (*class_init)();
+ void (*class_init)(void);
void (*class_req_handler)(req_t *req);
- void (*class_rx_handler)();
+ void (*class_rx_handler)(void);
} usb_pcb_t;
// prototypes
// usb.c
-void usb_init();
-usb_pcb_t *usb_pcb_get();
-void usb_reg_class_drvr(void (*class_cfg_init)(),
- void (*class_req_handler)(),
- void (*class_rx_handler)());
-void usb_poll();
-bool usb_ready();
+void usb_init(void);
+usb_pcb_t *usb_pcb_get(void);
+void usb_reg_class_drvr(void (*class_cfg_init)(void),
+ void (*class_req_handler)(req_t *req),
+ void (*class_rx_handler)(void));
+void usb_poll(void);
+bool usb_ready(void);
// req.c
-void ctrl_handler();
+void ctrl_handler(void);
// ep.c
-void ep_init();
+void ep_init(void);
void ep_select(U8 ep_num);
void ep_write_from_flash(U8 ep_num, U8 *data, U8 len);
void ep_write(U8 ep_num);
void ep_write_ctrl(U8 *data, U8 len, bool read_from_flash);
void ep_read(U8 ep_num);
void ep_set_addr(U8 addr);
-U8 ep_intp_get_num();
-U8 ep_intp_get_src();
+U8 ep_intp_get_num(void);
+U8 ep_intp_get_src(void);
void ep_set_stall(U8 ep_num);
void ep_clear_stall(U8 ep_num);
void ep_reset_toggle(U8 ep_num);
@@ -250,12 +250,12 @@
void ep_drain_fifo(U8 ep);
// desc.c
-U8 *desc_dev_get();
-U8 desc_dev_get_len();
-U8 *desc_cfg_get();
-U8 desc_cfg_get_len();
-U8 *desc_dev_qual_get();
-U8 desc_dev_qual_get_len();
+U8 *desc_dev_get(void);
+U8 desc_dev_get_len(void);
+U8 *desc_cfg_get(void);
+U8 desc_cfg_get_len(void);
+U8 *desc_dev_qual_get(void);
+U8 desc_dev_qual_get_len(void);
U8 *desc_str_get(U8 index);
U8 desc_str_get_len(U8 index);
Index: fw4/usb/usb.c
===================================================================
--- fw4.orig/usb/usb.c 2011-02-08 17:13:41.000000000 -0300
+++ fw4/usb/usb.c 2011-02-08 17:13:46.000000000 -0300
@@ -47,7 +47,7 @@
block for now.
*/
/**************************************************************************/
-void usb_init()
+void usb_init(void)
{
memset(&pcb, 0, sizeof(usb_pcb_t));
}
@@ -57,7 +57,7 @@
Get a pointer to the USB stack's protocol control block.
*/
/**************************************************************************/
-usb_pcb_t *usb_pcb_get()
+usb_pcb_t *usb_pcb_get(void)
{
return &pcb;
}
@@ -67,9 +67,9 @@
Register the class driver
*/
/**************************************************************************/
-void usb_reg_class_drvr(void (*class_init)(),
+void usb_reg_class_drvr(void (*class_init)(void),
void (*class_req_handler)(req_t *req),
- void (*class_rx_handler)())
+ void (*class_rx_handler)(void))
{
pcb.class_req_handler = class_req_handler;
pcb.class_init = class_init;
@@ -83,7 +83,7 @@
there are any pending CONTROL transfers.
*/
/**************************************************************************/
-void usb_poll()
+void usb_poll(void)
{
U8 i, ep_num;
Index: fw4/hw/at90usbxx2/isr.c
===================================================================
--- fw4.orig/hw/at90usbxx2/isr.c 2011-02-08 17:13:41.000000000 -0300
+++ fw4/hw/at90usbxx2/isr.c 2011-02-08 17:13:46.000000000 -0300
@@ -44,7 +44,7 @@
Clear all USB related interrupts.
*/
/**************************************************************************/
-void intp_clear_all()
+static void intp_clear_all(void)
{
U8 i;
@@ -62,7 +62,7 @@
Suspend interrupt handler.
*/
/**************************************************************************/
-void intp_suspend()
+static void intp_suspend(void)
{
SUSP_INT_CLR();
WAKEUP_INT_ENB();
@@ -77,7 +77,7 @@
Resume interrupt handler.
*/
/**************************************************************************/
-void intp_resume()
+static void intp_resume(void)
{
WAKEUP_INT_DIS();
RESM_INT_CLR();
@@ -89,7 +89,7 @@
Wakeup interrupt handler.
*/
/**************************************************************************/
-void intp_wakeup()
+static void intp_wakeup(void)
{
// unfreeze the clock
USBCON &= ~(1 << FRZCLK);
@@ -106,7 +106,7 @@
End of Reset interrupt handler. Gets triggered at the end of a bus reset.
*/
/**************************************************************************/
-void intp_eor()
+static void intp_eor(void)
{
EOR_INT_CLR();
ep_init();
Index: fw4/class/CDC/cdc.c
===================================================================
--- fw4.orig/class/CDC/cdc.c 2011-02-08 17:18:36.000000000 -0300
+++ fw4/class/CDC/cdc.c 2011-02-08 17:18:59.000000000 -0300
@@ -63,7 +63,7 @@
// this is the rx handler callback function. it gets registered by the application program
// and will handle any incoming data.
-static void (*rx_handler)();
+static void (*rx_handler)(void);
/**************************************************************************/
/*!
@@ -139,7 +139,7 @@
virtual COM data.
*/
/**************************************************************************/
-void cdc_rx_handler()
+void cdc_rx_handler(void)
{
if (rx_handler)
{
@@ -154,7 +154,7 @@
usually set this after the host issues the set_configuration request.
*/
/**************************************************************************/
-void cdc_ep_init()
+void cdc_ep_init(void)
{
// setup the endpoints
ep_config(EP_1, BULK, DIR_IN, MAX_PACKET_SZ);
@@ -168,7 +168,7 @@
function here since the CDC doesn't know what to do with received data.
*/
/**************************************************************************/
-void cdc_reg_rx_handler(void (*rx)())
+void cdc_reg_rx_handler(void (*rx)(void))
{
if (rx)
{
@@ -212,7 +212,7 @@
and rx data handler with the USB core.
*/
/**************************************************************************/
-void cdc_init()
+void cdc_init(void)
{
// hook the putchar function into the printf stdout filestream. This is needed
// for printf to work.

14
atusb/fw2/usb/patches/no-cdc.patch Normal file
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@ -0,0 +1,14 @@
Index: fw4/usb/freakusb.h
===================================================================
--- fw4.orig/usb/freakusb.h 2011-02-08 16:40:04.000000000 -0300
+++ fw4/usb/freakusb.h 2011-02-08 16:40:15.000000000 -0300
@@ -43,9 +43,6 @@
#include <stdio.h>
#include "types.h"
-// class specific
-#include "cdc.h"
-
// hw specific
#include "hw.h"

121
atusb/fw2/usb/patches/no-vbus-detect.patch Normal file
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@ -0,0 +1,121 @@
Index: fw4/hw/at90usbxx2/at90usb.h
===================================================================
--- fw4.orig/hw/at90usbxx2/at90usb.h 2011-02-08 15:58:49.000000000 -0300
+++ fw4/hw/at90usbxx2/at90usb.h 2011-02-08 15:59:22.000000000 -0300
@@ -42,14 +42,6 @@
#define AT90USB16
-#define VBUS_SENSE_DDR DDRB
-#define VBUS_SENSE_PORT PORTB
-#define VBUS_SENSE_PIN PINB
-#define VBUS_SENSE_IO 5
-
-// test if vbus is present
-#define is_vbus_on() ((VBUS_SENSE_PIN & (1<<VBUS_SENSE_IO)) != 0)
-
// banks
#define SINGLE 0
#define DUAL 1
Index: fw4/hw/at90usbxx2/hw.c
===================================================================
--- fw4.orig/hw/at90usbxx2/hw.c 2011-02-08 15:57:56.000000000 -0300
+++ fw4/hw/at90usbxx2/hw.c 2011-02-08 16:00:31.000000000 -0300
@@ -85,26 +85,14 @@
// set the interrupts: vbus, suspend, and end of reset
UDIEN |= (_BV(SUSPE) | _BV(EORSTE));
- // enable vbus sense pin
- VBUS_SENSE_DDR &= ~_BV(VBUS_SENSE_IO);
- VBUS_SENSE_PORT &= ~_BV(VBUS_SENSE_IO);
-
- // enable the vbus sense interrupt
- PCICR |= _BV(PCIE0);
- PCMSK0 |= _BV(PCINT5);
-
- // do an initial check to see if bus power is available. we
- // need this because we'll miss the first transition to vbus on
- if (is_vbus_on())
- {
- pcb->connected = true;
+ /* we're bus-powered, so VBUS is on by definition */
+ pcb->connected = true;
- // attach USB
- UDCON &= ~_BV(DETACH);
+ // attach USB
+ UDCON &= ~_BV(DETACH);
- // reset CPU
- //UDCON |= _BV(RSTCPU);
- }
+ // reset CPU
+ //UDCON |= _BV(RSTCPU);
// turn on the global interrupts
sei();
Index: fw4/hw/at90usbxx2/isr.c
===================================================================
--- fw4.orig/hw/at90usbxx2/isr.c 2011-02-08 16:00:34.000000000 -0300
+++ fw4/hw/at90usbxx2/isr.c 2011-02-08 16:00:56.000000000 -0300
@@ -249,60 +249,3 @@
sei();
}
-
-/**************************************************************************/
-/*!
- This ISR is only for the AT90USB16 since we need to use an IO as the VBUS sense
-*/
-/**************************************************************************/
-ISR(PCINT0_vect)
-{
- usb_pcb_t *pcb = usb_pcb_get();
-
- cli();
-
- if (is_vbus_on())
- {
- pcb->connected = true;
-
- // enable the 3.3V regulator for the USB pads
- REGCR &= ~_BV(REGDIS);
-
- // freeze the clock
- USBCON |= _BV(FRZCLK);
-
- // enable the 48 MHz PLL
- PLLCSR &= ~(_BV(PLLP2) | _BV(PLLP1) | _BV(PLLP0));
- PLLCSR |= _BV(1<<PLLE);
-
- // busy wait until the PLL is locked
- while (!(PLLCSR & _BV(PLOCK)));
-
- // unfreeze clock
- USBCON &= ~_BV(FRZCLK);
-
- // attach USB
- UDCON &= ~_BV(DETACH);
-
- // reset CPU
- UDCON |= _BV(RSTCPU);
- }
- else
- {
- // if we're connected, but VBUS is gone, then detach
-
- // detach from the bus
- UDCON |= _BV(DETACH);
-
- // freeze the clock and turn off the USB PLL
- USBCON |= _BV(FRZCLK);
- PLLCSR &= ~_BV(PLLE);
-
- // disable the USB voltage regulator
- REGCR |= _BV(REGDIS);
-
- pcb->connected = false;
- pcb->flags = 0;
- }
- sei();
-}

3
atusb/fw2/usb/patches/series Normal file
View File

@ -0,0 +1,3 @@
cleanup.patch
no-cdc.patch
no-vbus-detect.patch