mirror of
git://projects.qi-hardware.com/ben-wpan.git
synced 2025-04-21 12:27:27 +03:00
great atusd -> atben renaming: renamed tools/atusd.c and Makefile reference
- lib/atusd.c: renamed to lib/atben.c - lib/Makefile (OBJS_ben_jlime, OBJS_ben_openwrt): changed "atusd" to "atben"
This commit is contained in:
Werner Almesberger
355
tools/lib/atben.c
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355
tools/lib/atben.c
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/*
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* lib/atusd.c - ATRF access functions library (uSD version)
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*
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* Written 2010-2011 by Werner Almesberger
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* Copyright 2010-2011 Werner Almesberger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include "at86rf230.h"
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#include "driver.h"
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enum {
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VDD_OFF = 1 << 2, /* VDD disable, PD02 */
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MOSI = 1 << 8, /* CMD, PD08 */
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#ifdef OLD
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CLK = 1 << 9, /* CLK, PD09 */
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#else
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SLP_TR = 1 << 9, /* CLK, PD09 */
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#endif
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MISO = 1 << 10, /* DAT0, PD10 */
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SCLK = 1 << 11, /* DAT1, PD11 */
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IRQ = 1 << 12, /* DAT2, PD12 */
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nSEL = 1 << 13, /* DAT3/CD, PD13 */
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};
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#define SOC_BASE 0x10000000
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#define REG(n) (*(volatile uint32_t *) (dsc->mem+(n)))
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#define CGU(n) REG(0x00000+(n))
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#define GPIO(n) REG(0x10000+(n))
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#define MSC(n) REG(0x21000+(n))
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#define PDPIN GPIO(0x300) /* port D pin level */
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#define PDDATS GPIO(0x314) /* port D data set */
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#define PDDATC GPIO(0x318) /* port D data clear */
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#define PDFUNS GPIO(0x344) /* port D function set */
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#define PDFUNC GPIO(0x348) /* port D function clear */
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#define PDDIRS GPIO(0x364) /* port D direction set */
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#define PDDIRC GPIO(0x368) /* port D direction clear */
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#define MSC_STRPCL MSC(0x00) /* Start/stop MMC/SD clock */
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#define MSC_CLKRT MSC(0x08) /* MSC Clock Rate */
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#define CLKGR CGU(0x0020) /* Clock Gate */
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#define MSCCDR CGU(0x0068) /* MSC device clock divider */
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#define PAGE_SIZE 4096
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struct atusd_dsc {
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int fd;
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void *mem;
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};
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/* ----- Reset functions --------------------------------------------------- */
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static void wait_for_power(void)
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{
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/*
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* Give power time to stabilize and the chip time to reset.
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* Power takes about 2 ms to ramp up. We wait 10 ms to be sure.
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*/
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usleep(10*1000);
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}
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static void atusd_cycle(struct atusd_dsc *dsc)
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{
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/* stop the MMC bus clock */
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MSC_STRPCL = 1;
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/* drive all outputs low (including the MMC bus clock) */
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#ifdef OLD
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PDDATC = MOSI | CLK | SCLK | nSEL;
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/* make the MMC bus clock a regular output */
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PDFUNC = CLK;
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#else
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PDDATC = MOSI | SLP_TR | SCLK | nSEL;
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PDFUNC = SLP_TR;
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#endif
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/* cut the power */
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PDDATS = VDD_OFF;
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/* Power drains within about 20 ms. Wait 100 ms to be sure. */
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usleep(100*1000);
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/* drive MOSI and nSS high */
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PDDATS = MOSI | nSEL;
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/* precharge the capacitors to avoid current surge */
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wait_for_power();
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#ifdef OLD
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/* return the bus clock output to the MMC controller */
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PDFUNS = CLK;
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/* start MMC clock output */
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MSC_STRPCL = 2;
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#endif
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/* supply power */
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PDDATC = VDD_OFF;
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wait_for_power();
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}
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/* ----- Low-level SPI operations ------------------------------------------ */
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static void spi_begin(struct atusd_dsc *dsc)
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{
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PDDATC = nSEL;
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}
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static void spi_end(struct atusd_dsc *dsc)
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{
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PDDATS = nSEL;
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}
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static void spi_send(struct atusd_dsc *dsc, uint8_t v)
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{
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uint8_t mask;
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for (mask = 0x80; mask; mask >>= 1) {
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if (v & mask)
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PDDATS = MOSI;
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else
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PDDATC = MOSI;
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PDDATS = SCLK;
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PDDATC = SCLK;
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}
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}
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static uint8_t spi_recv(struct atusd_dsc *dsc)
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{
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uint8_t res = 0;
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uint8_t mask;
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for (mask = 0x80; mask; mask >>= 1) {
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if (PDPIN & MISO)
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res |= mask;
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PDDATS = SCLK;
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PDDATC = SCLK;
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}
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return res;
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}
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/* ----- Driver operations ------------------------------------------------- */
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static void atusd_reset_rf(void *handle)
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{
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struct atusd_dsc *dsc = handle;
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atusd_cycle(dsc);
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wait_for_power();
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}
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static void *atusd_open(void)
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{
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struct atusd_dsc *dsc;
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dsc = malloc(sizeof(*dsc));
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if (!dsc) {
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perror("malloc");
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exit(1);
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}
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dsc->fd = open("/dev/mem", O_RDWR | O_SYNC);
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if (dsc->fd < 0) {
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perror("/dev/mem");
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exit(1);
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}
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dsc->mem = mmap(NULL, PAGE_SIZE*3*16, PROT_READ | PROT_WRITE,
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MAP_SHARED, dsc->fd, SOC_BASE);
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if (dsc->mem == MAP_FAILED) {
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perror("mmap");
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exit(1);
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}
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/* set the output levels */
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PDDATS = nSEL | VDD_OFF;
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PDDATC = SCLK;
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/* take the GPIOs away from the MMC controller */
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#ifdef OLD
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PDFUNC = MOSI | MISO | SCLK | IRQ | nSEL;
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PDFUNS = CLK;
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#else
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PDFUNC = MOSI | MISO | SCLK | IRQ | nSEL | SLP_TR;
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#endif
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/* set the pin directions */
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PDDIRC = MISO | IRQ;
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#ifdef OLD
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PDDIRS = MOSI | CLK | SCLK | nSEL;
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#else
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PDDIRS = MOSI | SLP_TR | SCLK | nSEL;
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#endif
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/* let capacitors precharge */
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wait_for_power();
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/* enable power */
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PDDATC = VDD_OFF;
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#ifdef OLD
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/* set the MSC clock to 316 MHz / 21 = 16 MHz */
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MSCCDR = 20;
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/*
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* Enable the MSC clock. We need to do this before accessing any
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* registers of the MSC block !
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*/
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CLKGR &= ~(1 << 7);
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/* bus clock = MSC clock / 1 */
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MSC_CLKRT = 0;
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/* start MMC clock output */
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MSC_STRPCL = 2;
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#endif
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wait_for_power();
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atusd_reset_rf(dsc);
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return dsc;
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}
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static void atusd_close(void *arg)
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{
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struct atusd_dsc *dsc = arg;
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/* stop the MMC bus clock */
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MSC_STRPCL = 1;
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/* cut the power */
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PDDATS = VDD_OFF;
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/* make all MMC pins inputs */
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#ifdef OLD
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PDDIRC = MOSI | MISO | CLK | SCLK | IRQ | nSEL;
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#else
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PDDIRC = MOSI | MISO | SLP_TR | SCLK | IRQ | nSEL;
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#endif
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}
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static void atusd_reg_write(void *handle, uint8_t reg, uint8_t v)
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{
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struct atusd_dsc *dsc = handle;
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spi_begin(dsc);
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spi_send(dsc, AT86RF230_REG_WRITE | reg);
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spi_send(dsc, v);
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spi_end(dsc);
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}
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static uint8_t atusd_reg_read(void *handle, uint8_t reg)
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{
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struct atusd_dsc *dsc = handle;
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uint8_t res;
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spi_begin(dsc);
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spi_send(dsc, AT86RF230_REG_READ | reg);
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res = spi_recv(dsc);
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spi_end(dsc);
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return res;
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}
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static void atusd_buf_write(void *handle, const void *buf, int size)
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{
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struct atusd_dsc *dsc = handle;
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spi_begin(dsc);
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spi_send(dsc, AT86RF230_BUF_WRITE);
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spi_send(dsc, size);
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while (size--)
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spi_send(dsc, *(uint8_t *) buf++);
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spi_end(dsc);
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}
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static int atusd_buf_read(void *handle, void *buf, int size)
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{
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struct atusd_dsc *dsc = handle;
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uint8_t len, i;
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spi_begin(dsc);
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spi_send(dsc, AT86RF230_BUF_READ);
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len = spi_recv(dsc);
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len++; /* LQI */
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if (len > size)
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len = size;
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for (i = 0; i != len; i++)
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*(uint8_t *) buf++ = spi_recv(dsc);
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spi_end(dsc);
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return len;
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}
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/* ----- RF interrupt ------------------------------------------------------ */
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static int atusd_interrupt(void *handle)
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{
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struct atusd_dsc *dsc = handle;
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return !!(PDPIN & IRQ);
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}
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/* ----- Driver interface -------------------------------------------------- */
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struct atrf_driver atusd_driver = {
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.name = "uSD",
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.open = atusd_open,
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.close = atusd_close,
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.reset = NULL,
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.reset_rf = atusd_reset_rf,
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.test_mode = NULL,
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.reg_write = atusd_reg_write,
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.reg_read = atusd_reg_read,
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.buf_write = atusd_buf_write,
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.buf_read = atusd_buf_read,
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.interrupt = atusd_interrupt,
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};
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