From 4521837dff722a2f17805d882daf98043f433b0f Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Thu, 3 Feb 2011 03:46:26 -0300 Subject: [PATCH] atusb-pgm: programming adapter that connects to the Universal Breakout Board --- atusb-pgm/Makefile | 31 +++ atusb-pgm/atusb-pgm.brd | 472 ++++++++++++++++++++++++++++++++++++++++ atusb-pgm/atusb-pgm.cmp | 115 ++++++++++ atusb-pgm/atusb-pgm.pro | 65 ++++++ atusb-pgm/atusb-pgm.sch | 237 ++++++++++++++++++++ atusb-pgm/cam/Makefile | 26 +++ 6 files changed, 946 insertions(+) create mode 100644 atusb-pgm/Makefile create mode 100644 atusb-pgm/atusb-pgm.brd create mode 100644 atusb-pgm/atusb-pgm.cmp create mode 100644 atusb-pgm/atusb-pgm.pro create mode 100644 atusb-pgm/atusb-pgm.sch create mode 100644 atusb-pgm/cam/Makefile diff --git a/atusb-pgm/Makefile b/atusb-pgm/Makefile new file mode 100644 index 0000000..d112ce9 --- /dev/null +++ b/atusb-pgm/Makefile @@ -0,0 +1,31 @@ +PLOT_BRD = pcbnew --plot=ps_a4 --ps-pads-drill-opt=none --fill-all-zones + +NAME = atusb-pgm + +.PHONY: all sch brd front back clean + +all: + @echo "make what ? target: sch brd front back clean" + @exit 1 + +sch: + eeschema `pwd`/$(NAME).sch + +brd: + pcbnew `pwd`/$(NAME).brd + +front: $(NAME)-Front.ps + lpr $< + +back: $(NAME)-Back.ps + lpr $< + +%-Front.ps: %.brd + $(PLOT_BRD) -l Front --mirror $< + +%-Back.ps: %.brd + $(PLOT_BRD) -l Back $< + +clean: + rm -f $(NAME)-Front.ps $(NAME)-Back.ps + rm -f $(NAME).drl $(NAME)-PCB_Edges.gbr diff --git a/atusb-pgm/atusb-pgm.brd b/atusb-pgm/atusb-pgm.brd new file mode 100644 index 0000000..ac3acaa --- /dev/null +++ b/atusb-pgm/atusb-pgm.brd @@ -0,0 +1,472 @@ +PCBNEW-BOARD Version 1 date Thu Feb 3 03:17:34 2011 + +# Created by Pcbnew(2010-12-27 BZR 2685)-unstable + +$GENERAL +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 1FA88001 +Links 9 +NoConn 0 +Di 54974 42400 68526 47100 +Ndraw 6 +Ntrack 15 +Nzone 0 +BoardThickness 630 +Nmodule 16 +Nnets 9 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "ATUSB Programming Adapter" +Date "3 feb 2011" +Rev "20110203" +Comp "Werner Almesberger" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +ZoneGridSize 250 +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 100 +TrackClearence 100 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 50 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 100 +TextPcbSize 600 600 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "/CLK" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "/CMD" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "/DAT0" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "/DAT2" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 5 "/DAT3" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 6 "/GND" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 7 "/VDD" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 8 "N-000001" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 100 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "/CLK" +AddNet "/CMD" +AddNet "/DAT0" +AddNet "/DAT2" +AddNet "/DAT3" +AddNet "/GND" +AddNet "/VDD" +AddNet "N-000001" +$EndNCLASS +$MODULE PAD_2mm +Po 66000 45500 0 15 4D34EABB 4D4A43AE ~~ +Li PAD_2mm +Sc 4D4A43AE +AR /4D4A409E +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P12" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 6 "/GND" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 66000 46000 0 15 4D34EABB 4D4A43B0 ~~ +Li PAD_2mm +Sc 4D4A43B0 +AR /4D4A4156 +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P13" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 3 "/DAT0" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 66000 46500 0 15 4D34EABB 4D4A43B2 ~~ +Li PAD_2mm +Sc 4D4A43B2 +AR /4D4A415C +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P14" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 0 "" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 66000 45000 0 15 4D34EABB 4D4A43B4 ~~ +Li PAD_2mm +Sc 4D4A43B4 +AR /4D4A415F +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P11" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 1 "/CLK" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 66000 44500 0 15 4D34EABB 4D4A43B6 ~~ +Li PAD_2mm +Sc 4D4A43B6 +AR /4D4A4160 +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P10" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 7 "/VDD" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 66000 44000 0 15 4D34EABB 4D4A43B8 ~~ +Li PAD_2mm +Sc 4D4A43B8 +AR /4D4A4162 +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P9" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 2 "/CMD" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 66000 43500 0 15 4D34EABB 4D4A43BA ~~ +Li PAD_2mm +Sc 4D4A43BA +AR /4D4A41CC +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P8" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 5 "/DAT3" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 66000 43000 0 15 4D34EABB 4D4A43BC ~~ +Li PAD_2mm +Sc 4D4A43BC +AR /4D4A41CE +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P7" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 4 "/DAT2" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_60x60 +Po 56000 45000 0 15 4D34EABB 4D4A43BD ~~ +Li PAD_60x60 +Sc 4D4A43BD +AR /4D4A40B2 +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P1" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 600 600 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 4 "/DAT2" +Po 0 0 +$EndPAD +$EndMODULE PAD_60x60 +$MODULE PAD_60x60 +Po 57000 45000 0 15 4D34EABB 4D4A43BF ~~ +Li PAD_60x60 +Sc 4D4A43BF +AR /4D4A4125 +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P2" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 600 600 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 5 "/DAT3" +Po 0 0 +$EndPAD +$EndMODULE PAD_60x60 +$MODULE PAD_60x60 +Po 58000 45000 0 15 4D34EABB 4D4A43C1 ~~ +Li PAD_60x60 +Sc 4D4A43C1 +AR /4D4A4128 +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P3" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 600 600 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 2 "/CMD" +Po 0 0 +$EndPAD +$EndMODULE PAD_60x60 +$MODULE PAD_60x60 +Po 59000 45000 0 15 4D34EABB 4D4A43C3 ~~ +Li PAD_60x60 +Sc 4D4A43C3 +AR /4D4A412C +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P4" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 600 600 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 3 "/DAT0" +Po 0 0 +$EndPAD +$EndMODULE PAD_60x60 +$MODULE PAD_60x60 +Po 60000 45000 0 15 4D34EABB 4D4A43C5 ~~ +Li PAD_60x60 +Sc 4D4A43C5 +AR /4D4A412F +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P5" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 600 600 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 7 "/VDD" +Po 0 0 +$EndPAD +$EndMODULE PAD_60x60 +$MODULE PAD_60x60 +Po 61000 45000 0 15 4D34EABB 4D4A43C7 ~~ +Li PAD_60x60 +Sc 4D4A43C7 +AR /4D4A4131 +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"P6" +T1 0 150 200 200 0 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 600 600 0 0 0 +Dr 0 0 0 +At SMD N 00808000 +Ne 6 "/GND" +Po 0 0 +$EndPAD +$EndMODULE PAD_60x60 +$MODULE 0603 +Po 64000 45000 0 15 4D3AED1A 4D4A43CC ~~ +Li 0603 +Sc 4D4A43CC +AR /4D4A40C2 +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"R1" +T1 0 150 200 200 0 40 N I 25 N"100" +DS -531 275 -531 -275 50 21 +DS -531 -275 531 -275 50 21 +DS 531 -275 531 275 50 21 +DS 531 275 -531 275 50 21 +$PAD +Sh "1" R 276 354 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 8 "N-000001" +Po -295 0 +$EndPAD +$PAD +Sh "2" R 276 354 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 1 "/CLK" +Po 295 0 +$EndPAD +$EndMODULE 0603 +$MODULE 0603 +Po 62500 45000 1800 15 4D3AED1A 4D4A43CE ~~ +Li 0603 +Sc 4D4A43CE +AR /4D4A40C6 +Op 0 0 0 +At SMD +T0 0 -150 200 200 1800 40 N V 25 N"D1" +T1 0 150 200 200 1800 40 N I 25 N"LTST-C190KRKT" +DS -531 275 -531 -275 50 21 +DS -531 -275 531 -275 50 21 +DS 531 -275 531 275 50 21 +DS 531 275 -531 275 50 21 +$PAD +Sh "1" R 276 354 0 0 1800 +Dr 0 0 0 +At SMD N 00888000 +Ne 8 "N-000001" +Po -295 0 +$EndPAD +$PAD +Sh "2" R 276 354 0 0 1800 +Dr 0 0 0 +At SMD N 00888000 +Ne 6 "/GND" +Po 295 0 +$EndPAD +$EndMODULE 0603 +$DRAWSEGMENT +Po 0 68500 42500 57500 42500 50 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$DRAWSEGMENT +Po 0 55000 47000 55000 45000 50 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$DRAWSEGMENT +Po 0 55000 45000 57500 42500 50 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$DRAWSEGMENT +Po 0 68500 47000 55000 47000 50 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$TEXTPCB +Te "110203" +Po 57500 46000 600 600 100 0 +De 15 1 0 Normal +$EndTEXTPCB +$DRAWSEGMENT +Po 0 68500 42500 68500 47000 50 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$TRACK +Po 0 66000 45000 64295 45000 100 -1 +De 15 0 1 0 C00 +Po 0 66000 44000 59000 44000 100 -1 +De 15 0 2 0 800 +Po 0 59000 44000 58000 45000 100 -1 +De 15 0 2 0 400 +Po 0 66000 46000 60000 46000 100 -1 +De 15 0 3 0 800 +Po 0 60000 46000 59000 45000 100 -1 +De 15 0 3 0 400 +Po 0 66000 43000 58000 43000 100 -1 +De 15 0 4 0 800 +Po 0 58000 43000 56000 45000 100 -1 +De 15 0 4 0 400 +Po 0 66000 43500 58500 43500 100 -1 +De 15 0 5 0 800 +Po 0 58500 43500 57000 45000 100 -1 +De 15 0 5 0 400 +Po 0 61000 45000 62205 45000 100 -1 +De 15 0 6 0 C00 +Po 0 66000 45500 62705 45500 100 -1 +De 15 0 6 0 800 +Po 0 62705 45500 62205 45000 100 -1 +De 15 0 6 0 400 +Po 0 66000 44500 60500 44500 100 -1 +De 15 0 7 0 800 +Po 0 60500 44500 60000 45000 100 -1 +De 15 0 7 0 400 +Po 0 62795 45000 63705 45000 100 -1 +De 15 0 8 0 C00 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/atusb-pgm/atusb-pgm.cmp b/atusb-pgm/atusb-pgm.cmp new file mode 100644 index 0000000..baa99b4 --- /dev/null +++ b/atusb-pgm/atusb-pgm.cmp @@ -0,0 +1,115 @@ +Cmp-Mod V01 Created by CvPCB (2010-12-27 BZR 2685)-unstable date = Thu Feb 3 02:55:10 2011 + +BeginCmp +TimeStamp = /4D4A40C6; +Reference = D1; +ValeurCmp = LTST-C190KRKT; +IdModule = 0603; +EndCmp + +BeginCmp +TimeStamp = /4D4A40B2; +Reference = P1; +ValeurCmp = CONN_1; +IdModule = PAD_60x60; +EndCmp + +BeginCmp +TimeStamp = /4D4A4125; +Reference = P2; +ValeurCmp = CONN_1; +IdModule = PAD_60x60; +EndCmp + +BeginCmp +TimeStamp = /4D4A4128; +Reference = P3; +ValeurCmp = CONN_1; +IdModule = PAD_60x60; +EndCmp + +BeginCmp +TimeStamp = /4D4A412C; +Reference = P4; +ValeurCmp = CONN_1; +IdModule = PAD_60x60; +EndCmp + +BeginCmp +TimeStamp = /4D4A412F; +Reference = P5; +ValeurCmp = CONN_1; +IdModule = PAD_60x60; +EndCmp + +BeginCmp +TimeStamp = /4D4A4131; +Reference = P6; +ValeurCmp = CONN_1; +IdModule = PAD_60x60; +EndCmp + +BeginCmp +TimeStamp = /4D4A41CE; +Reference = P7; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D4A41CC; +Reference = P8; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D4A4162; +Reference = P9; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D4A4160; +Reference = P10; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D4A415F; +Reference = P11; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D4A409E; +Reference = P12; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D4A4156; +Reference = P13; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D4A415C; +Reference = P14; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D4A40C2; +Reference = R1; +ValeurCmp = 100; +IdModule = 0603; +EndCmp + +EndListe diff --git a/atusb-pgm/atusb-pgm.pro b/atusb-pgm/atusb-pgm.pro new file mode 100644 index 0000000..87e16e8 --- /dev/null +++ b/atusb-pgm/atusb-pgm.pro @@ -0,0 +1,65 @@ +update=Thu Feb 3 03:18:28 2011 +last_client=pcbnew +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +PrintMonochrome=1 +ShowSheetReferenceAndTitleBlock=1 +[eeschema/libraries] +LibName1=conn +LibName2=device +[cvpcb] +version=1 +NetIExt=net +[cvpcb/libraries] +EquName1=devcms +[pcbnew] +version=1 +PadDrlX=320 +PadDimH=600 +PadDimV=600 +BoardThickness=630 +SgPcb45=1 +TxtPcbV=600 +TxtPcbH=600 +TxtModV=600 +TxtModH=600 +TxtModW=120 +VEgarde=100 +DrawLar=150 +EdgeLar=50 +TxtLar=100 +MSegLar=150 +LastNetListRead=atusb-pgm.net +[pcbnew/libraries] +LibDir= +LibName1=../../kicad-libs/modules/pads +LibName2=../../kicad-libs/modules/stdpass diff --git a/atusb-pgm/atusb-pgm.sch b/atusb-pgm/atusb-pgm.sch new file mode 100644 index 0000000..d2e2e71 --- /dev/null +++ b/atusb-pgm/atusb-pgm.sch @@ -0,0 +1,237 @@ +EESchema Schematic File Version 2 date Thu Feb 3 02:56:28 2011 +LIBS:conn +LIBS:device +EELAYER 43 0 +EELAYER END +$Descr A4 11700 8267 +Sheet 1 1 +Title "ATUSB Programming Adapter" +Date "3 feb 2011" +Rev "20110203" +Comp "Werner Almesberger" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +NoConn ~ 7500 4900 +Wire Wire Line + 8150 4900 7500 4900 +Wire Wire Line + 5300 4750 5300 4300 +Wire Wire Line + 5300 4750 8150 4750 +Wire Wire Line + 8150 4000 3950 4000 +Wire Wire Line + 6350 4450 6550 4450 +Connection ~ 5750 4600 +Wire Wire Line + 5750 4450 5750 4600 +Wire Wire Line + 5750 4450 5950 4450 +Wire Wire Line + 8150 4600 3950 4600 +Wire Wire Line + 8150 4300 5550 4300 +Wire Wire Line + 5550 4300 5550 4450 +Wire Wire Line + 5550 4450 3950 4450 +Wire Wire Line + 8150 4450 7050 4450 +Wire Wire Line + 3950 3850 8150 3850 +Wire Wire Line + 3950 4150 8150 4150 +Wire Wire Line + 5300 4300 3950 4300 +Text Label 7700 4900 0 60 ~ 0 +DAT1 +Text Label 7700 4750 0 60 ~ 0 +DAT0 +Text Label 7700 4600 0 60 ~ 0 +GND +Text Label 7700 4450 0 60 ~ 0 +CLK +Text Label 7700 4300 0 60 ~ 0 +VDD +Text Label 7700 4150 0 60 ~ 0 +CMD +Text Label 7700 4000 0 60 ~ 0 +DAT3 +Text Label 7700 3850 0 60 ~ 0 +DAT2 +Text Label 4150 3850 0 60 ~ 0 +SCK +Text Label 4150 4000 0 60 ~ 0 +PDI +Text Label 4150 4150 0 60 ~ 0 +PDO +Text Label 4150 4300 0 60 ~ 0 +nRESET +Text Label 4150 4450 0 60 ~ 0 +VDD +Text Label 4150 4600 0 60 ~ 0 +GND +$Comp +L CONN_1 P7 +U 1 1 4D4A41CE +P 8300 3850 +F 0 "P7" H 8380 3850 40 0000 L CNN +F 1 "CONN_1" H 8300 3905 30 0001 C CNN +F 2 "PAD_2mm" H 8300 3850 60 0001 C CNN + 1 8300 3850 + 1 0 0 -1 +$EndComp +$Comp +L CONN_1 P8 +U 1 1 4D4A41CC +P 8300 4000 +F 0 "P8" H 8380 4000 40 0000 L CNN +F 1 "CONN_1" H 8300 4055 30 0001 C CNN +F 2 "PAD_2mm" H 8300 4000 60 0001 C CNN + 1 8300 4000 + 1 0 0 -1 +$EndComp +$Comp +L CONN_1 P9 +U 1 1 4D4A4162 +P 8300 4150 +F 0 "P9" H 8380 4150 40 0000 L CNN +F 1 "CONN_1" H 8300 4205 30 0001 C CNN +F 2 "PAD_2mm" H 8300 4150 60 0001 C CNN + 1 8300 4150 + 1 0 0 -1 +$EndComp +$Comp +L CONN_1 P10 +U 1 1 4D4A4160 +P 8300 4300 +F 0 "P10" H 8380 4300 40 0000 L CNN +F 1 "CONN_1" H 8300 4355 30 0001 C CNN +F 2 "PAD_2mm" H 8300 4300 60 0001 C CNN + 1 8300 4300 + 1 0 0 -1 +$EndComp +$Comp +L CONN_1 P11 +U 1 1 4D4A415F +P 8300 4450 +F 0 "P11" H 8380 4450 40 0000 L CNN +F 1 "CONN_1" H 8300 4505 30 0001 C CNN +F 2 "PAD_2mm" H 8300 4450 60 0001 C CNN + 1 8300 4450 + 1 0 0 -1 +$EndComp +$Comp +L CONN_1 P14 +U 1 1 4D4A415C +P 8300 4900 +F 0 "P14" H 8380 4900 40 0000 L CNN +F 1 "CONN_1" H 8300 4955 30 0001 C CNN +F 2 "PAD_2mm" H 8300 4900 60 0001 C CNN + 1 8300 4900 + 1 0 0 -1 +$EndComp +$Comp +L CONN_1 P13 +U 1 1 4D4A4156 +P 8300 4750 +F 0 "P13" H 8380 4750 40 0000 L CNN +F 1 "CONN_1" H 8300 4805 30 0001 C CNN +F 2 "PAD_2mm" H 8300 4750 60 0001 C CNN + 1 8300 4750 + 1 0 0 -1 +$EndComp +$Comp +L CONN_1 P6 +U 1 1 4D4A4131 +P 3800 4600 +F 0 "P6" H 3880 4600 40 0000 L CNN +F 1 "CONN_1" H 3800 4655 30 0001 C CNN +F 2 "PAD_60x60" H 3800 4600 60 0001 C CNN + 1 3800 4600 + -1 0 0 1 +$EndComp +$Comp +L CONN_1 P5 +U 1 1 4D4A412F +P 3800 4450 +F 0 "P5" H 3880 4450 40 0000 L CNN +F 1 "CONN_1" H 3800 4505 30 0001 C CNN +F 2 "PAD_60x60" H 3800 4450 60 0001 C CNN + 1 3800 4450 + -1 0 0 1 +$EndComp +$Comp +L CONN_1 P4 +U 1 1 4D4A412C +P 3800 4300 +F 0 "P4" H 3880 4300 40 0000 L CNN +F 1 "CONN_1" H 3800 4355 30 0001 C CNN +F 2 "PAD_60x60" H 3800 4300 60 0001 C CNN + 1 3800 4300 + -1 0 0 1 +$EndComp +$Comp +L CONN_1 P3 +U 1 1 4D4A4128 +P 3800 4150 +F 0 "P3" H 3880 4150 40 0000 L CNN +F 1 "CONN_1" H 3800 4205 30 0001 C CNN +F 2 "PAD_60x60" H 3800 4150 60 0001 C CNN + 1 3800 4150 + -1 0 0 1 +$EndComp +$Comp +L CONN_1 P2 +U 1 1 4D4A4125 +P 3800 4000 +F 0 "P2" H 3880 4000 40 0000 L CNN +F 1 "CONN_1" H 3800 4055 30 0001 C CNN +F 2 "PAD_60x60" H 3800 4000 60 0001 C CNN + 1 3800 4000 + -1 0 0 1 +$EndComp +$Comp +L LED D1 +U 1 1 4D4A40C6 +P 6150 4450 +F 0 "D1" H 6150 4550 50 0000 C CNN +F 1 "LTST-C190KRKT" H 6150 4350 50 0000 C CNN +F 2 "0603" H 6150 4450 60 0001 C CNN + 1 6150 4450 + -1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 4D4A40C2 +P 6800 4450 +F 0 "R1" V 6880 4450 50 0000 C CNN +F 1 "100" V 6800 4450 50 0000 C CNN +F 2 "0603" H 6800 4450 60 0001 C CNN + 1 6800 4450 + 0 -1 -1 0 +$EndComp +$Comp +L CONN_1 P1 +U 1 1 4D4A40B2 +P 3800 3850 +F 0 "P1" H 3880 3850 40 0000 L CNN +F 1 "CONN_1" H 3800 3905 30 0001 C CNN +F 2 "PAD_60x60" H 3800 3850 60 0001 C CNN + 1 3800 3850 + -1 0 0 1 +$EndComp +$Comp +L CONN_1 P12 +U 1 1 4D4A409E +P 8300 4600 +F 0 "P12" H 8380 4600 40 0000 L CNN +F 1 "CONN_1" H 8300 4655 30 0001 C CNN +F 2 "PAD_2mm" H 8300 4600 60 0001 C CNN + 1 8300 4600 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/atusb-pgm/cam/Makefile b/atusb-pgm/cam/Makefile new file mode 100644 index 0000000..c8812a7 --- /dev/null +++ b/atusb-pgm/cam/Makefile @@ -0,0 +1,26 @@ +MKMK=../../../ben-blinkenlights/ubb/cam/mkmk + +NAME=atusb-pgm + +# 8.0 + 31 mm +BOARD = X0=39.0mm Y0=8.1mm +FAB = X=0 Y=0 XN=1 YN=2 + +.PHONY: all clean + +all: Makefile.mkmk + +Makefile.mkmk: $(MKMK) ../$(NAME).drl ../$(NAME)-PCB_Edges.gbr + $(MKMK) NAME=$(NAME) $(BOARD) $(FAB) + +../$(NAME).drl: ../$(NAME).brd + pcbnew --drill `pwd`/../$(NAME).brd + touch $@ + +../$(NAME)-PCB_Edges.gbr: ../$(NAME).brd + pcbnew --plot=gerber -l PCB_Edges `pwd`/../$(NAME).brd + +-include Makefile.mkmk + +clean:: + rm -f Makefile.mkmk