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git://projects.qi-hardware.com/ben-wpan.git
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Reuse some symbols and footprints from IDBG and gta02-core.
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parent
e754b057c3
commit
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13
components/INFO
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13
components/INFO
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#
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# Tags:
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#
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# S Symbol name (must be first)
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# M Package marking
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# D Data sheet identifier (N tag of ds/INFO; can be omitted if equal to S)
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#
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# C8051F326 MCU
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S: c8051f326
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# mini_usb_b (generic)
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S: mini_usb_b
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3
components/c8051f326.dcm
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3
components/c8051f326.dcm
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EESchema-DOCLIB Version 2.0 Date: Fri Jul 30 15:02:40 2010
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#
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#End Doc Library
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37
components/c8051f326.lib
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37
components/c8051f326.lib
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EESchema-LIBRARY Version 2.3 Date: Fri Jul 30 15:02:40 2010
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#
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# C8051F326
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#
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DEF C8051F326 U 0 40 Y Y 1 F N
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F0 "U" -1000 1200 60 H V C CNN
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F1 "C8051F326" 0 0 60 H V C CNN
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DRAW
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S -1100 1100 1100 -1100 0 1 0 N
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X P0.0/INT0/nSYSCLK 1 -1400 450 300 R 50 50 1 1 T
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X GND 2 -1400 300 300 R 50 50 1 1 W
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X D+ 3 -1400 150 300 R 50 50 1 1 B
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X D- 4 -1400 0 300 R 50 50 1 1 B
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X VIO 5 -1400 -150 300 R 50 50 1 1 W
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X VDD 6 -1400 -300 300 R 50 50 1 1 w
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X REGIN 7 -1400 -450 300 R 50 50 1 1 W
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X VBUS 8 -450 -1400 300 U 50 50 1 1 w
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X nRST/C2CK 9 -300 -1400 300 U 50 50 1 1 I
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X P3.0/C2D 10 -150 -1400 300 U 50 50 1 1 T
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X P2.3 11 0 -1400 300 U 50 50 1 1 T
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X P2.2 12 150 -1400 300 U 50 50 1 1 T
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X P0.7 22 450 1400 300 D 50 50 1 1 T
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X P0.6 23 300 1400 300 D 50 50 1 1 T
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X P0.5/RX 24 150 1400 300 D 50 50 1 1 T
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X P0.4/TX 25 0 1400 300 D 50 50 1 1 T
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X P2.5 16 1400 -300 300 L 50 50 1 1 T
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X P0.3/XTAL2 26 -150 1400 300 D 50 50 1 1 T
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X P2.4 17 1400 -150 300 L 50 50 1 1 T
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X P0.2/nINT0 27 -300 1400 300 D 50 50 1 1 T
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X P2.1 18 1400 0 300 L 50 50 1 1 T
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X P0.1 28 -450 1400 300 D 50 50 1 1 T
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X P2.0 19 1400 150 300 L 50 50 1 1 T
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X PAD 29 900 -1400 300 U 50 50 1 1 W
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ENDDRAW
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ENDDEF
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#
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#End Library
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3
components/mini_usb_b.dcm
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3
components/mini_usb_b.dcm
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EESchema-DOCLIB Version 2.0 Date: Tue May 26 17:42:05 2009
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#
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#End Doc Library
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23
components/mini_usb_b.lib
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23
components/mini_usb_b.lib
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EESchema-LIBRARY Version 2.3 Date: 6/6/2009-21:41:38
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#
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# MINI_USB_B
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#
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DEF MINI_USB_B CON 0 40 Y Y 1 F N
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F0 "CON" 0 500 60 H V C C
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F1 "MINI_USB_B" 0 -500 60 H V C C
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ALIAS CMK_A425-206162-001
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DRAW
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S -400 400 350 -400 0 1 0 N
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X SHELL4 9 550 -300 200 L 50 50 1 1 W
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X SHELL3 8 550 -150 200 L 50 50 1 1 W
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X SHELL2 7 550 150 200 L 50 50 1 1 W
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X SHELL1 6 550 300 200 L 50 50 1 1 W
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X GND 5 -600 -300 200 R 50 50 1 1 P
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X ID 4 -600 -150 200 R 50 50 1 1 P
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X D+ 3 -600 0 200 R 50 50 1 1 B
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X D- 2 -600 150 200 R 50 50 1 1 B
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X VBUS 1 -600 300 200 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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#End Library
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10
ds/INFO
10
ds/INFO
@ -22,3 +22,13 @@ N: avr2005
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A: at86rf230-design
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A: design
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D: http://www.atmel.com/dyn/resources/prod_documents/doc8092.pdf
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# Mini-USB B receptacle (this footprint is fairly universal)
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N: mini_usb_b
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D: http://jae-connector.com/en/pdf/SJ037525.pdf
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# D: http://documents.tycoelectronics.com/commerce/DocumentDelivery/DDEController?Action=srchrtrv&DocNm=1734035&DocType=CD&DocLang=EN
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# Footprints of standard rectangular passive components
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N: stdpass
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D: http://www.vishay.com/doc?20035
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@ -2,9 +2,15 @@
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# Tags:
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#
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# F Footprint name (must be first)
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# D Data sheet identifier (N tag of ds/INFO)
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# D Data sheet identifier (N tag of ds/INFO; can be omitted if equal to F)
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#
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# TI meandered inverted F antenna
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F: meander
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D: AN043
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# Mini-USB B receptable (SMT; almost generic)
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F: mini_usb_b
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# Standard rectangular passive components
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F: stdpass
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114
modules/mini-usb.fpd
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114
modules/mini-usb.fpd
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/*Mini USB Type B connector*/
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frame pad{
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set name=i
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ur: vec @(0mm,w/2)
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ll: vec @(-l,-w/2)
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pad "$name" ur ll
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}
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frame pad_gnd {
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set name1=i
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set name2=i+2
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pos1_ur: vec @(gnd_x/2,gnd_y/2)
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pos2_ur: vec .(0mm,-b_y)
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pos1_ll: vec @(-gnd_x/2,-gnd_y/2)
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pos2_ll: vec .(0mm,-b_y)
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center: vec @(0mm,-b_y)
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pad "$name1" pos1_ur pos1_ll
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pad "$name2" pos2_ur pos2_ll
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}
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frame pads {
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loop i=1,5
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pos: vec @(0mm,2*p-(i-1)*p)
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frame pad .
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}
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frame pads_gnd{
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loop i=6,7
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pos: vec @(-gnd_x/2-a_x*(i-6),b_y/2)
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frame pad_gnd .
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}
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frame holes {
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c1: vec @(-f,c/2)
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d1: vec .(0mm,d/2)
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c2: vec @(-f,-c/2)
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d2: vec .(0mm,d/2)
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circ c1 d1 0.01mm
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circ c2 d2 0.01mm
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}
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frame outline {
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ur: vec @(-f+A1_x,B_y/2)
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ll: vec @(-e,-B_y/2)
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rect ur ll silk
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ur2: vec @(-e,B_y/2)
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ll2: vec @(-f-A2_x,-B_y/2)
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rect ur2 ll2 silk
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}
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package "miniUSB_B"
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unit mm
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/*GND pad size*/
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set gnd_y = 2mm
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set gnd_x = 2.5mm
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/*pad size*/
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set w=0.5mm
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set l=2.3mm
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/*pitch*/
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set p = 0.8mm
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/*distance center GND pad -> center pin1 */
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set a=2.85mm
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/*distance GND pad -> GND pad*/
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set a_x=5.5mm
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set b_y=8.9mm
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/*distance between drill holes*/
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set c=4.4mm
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/*x distance drill hole -> outer edge pin 1*/
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set f=3.75mm
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/*drill hole diameter*/
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set d=0.9mm
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/*distance outer edge of pin1 -> PCB edge*/
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set e=9mm
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/*outline x direction, center holes -> edges*/
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set A1_x=3.3mm
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set A2_x=5.9mm
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/*outline y direction*/
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set B_y=7.7mm
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set silk=0.1mm
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__0: vec @(0mm, 0mm)
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frame pads @
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frame pads_gnd @
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frame holes @
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frame outline @
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measy pad.ll -> pad.ur -l-2mm
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measy pad_gnd.pos2_ll -> pad_gnd.pos2_ur 0.3mm
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measx pad_gnd.pos1_ll -> pad_gnd.pos1_ur -1mm
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measy __0 -> pads.pos -0.5mm
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measy pads.pos >> pads.pos -1.5mm
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measx pads_gnd.pos >> pads_gnd.pos 2mm
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measx outline.ur2 >> pad.ur 3.5mm
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measx outline.ll >> holes.c2 -3mm
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measy holes.c2 >> holes.c1 A2_x+1mm
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measy outline.ll2 >> outline.ur2 2mm
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measx pad.ll -> pads.pos -1mm
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measy pads_gnd.pos << pad_gnd.center -5mm
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56
modules/stdpass.fpd
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56
modules/stdpass.fpd
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/* MACHINE-GENERATED ! */
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frame pad_r {
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ll: vec @(0mm, -b/2)
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x: vec .(a, 0mm)
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y: vec ll(0mm, b)
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pad "2" . x
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}
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frame pad_l {
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ll: vec @(-a, -b/2)
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w: vec .(a, 0mm)
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h: vec ll(0mm, b)
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pad "1" . w
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}
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frame pads {
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left: vec @(-e/2, 0mm)
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frame pad_l .
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right: vec @(e/2, 0mm)
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frame pad_r .
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}
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frame outline {
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ll: vec @(-Ox/2, -Oy/2)
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ur: vec @(Ox/2, Oy/2)
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rect ll . silk
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}
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package "$name"
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unit mm
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table
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{ name, L, W, a, b, e }
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{ "0201", 0.6mm, 0.3mm, 0.28mm, 0.43mm, 0.23mm }
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{ "0402", 1mm, 0.5mm, 0.4mm, 0.6mm, 0.5mm }
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{ "0603", 1.55mm, 0.85mm, 0.5mm, 0.9mm, 1mm }
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{ "0805", 2mm, 1.25mm, 0.7mm, 1.3mm, 1.2mm }
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{ "1206", 3.2mm, 1.6mm, 0.9mm, 1.7mm, 2mm }
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{ "1210", 3.2mm, 2.5mm, 0.9mm, 2.5mm, 2mm }
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set silk = 5mil
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set clear = 5mil
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set Ox = e+2*a+2*clear
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set Oy = b+2*clear
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frame pads @
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frame outline @
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measx pad_l.w >> pad_r.ll -0.3mm
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measx pad_l.ll -> pad_l.w -0.3mm
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measy pad_l.ll >> pad_l.h 0.3mm
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measx outline.ll >> outline.ur Oy+0.3mm
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measy outline.ur >> outline.ll 0.3mm
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measx pad_l.ll >> pad_r.x -0.5mm
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