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mirror of git://projects.qi-hardware.com/ben-wpan.git synced 2024-11-22 08:30:17 +02:00

atusb: fw: first round of re-factor after the integration of rzusb as a board

Move board specific parts in board_$NAME.c/h for a little abstraction and less
ifdef handling in common code.
This commit is contained in:
Stefan Schmidt 2016-03-30 00:03:48 +02:00
parent 9d043dcfd4
commit 65912c2acb
7 changed files with 229 additions and 102 deletions

View File

@ -46,6 +46,16 @@ OBJS = atusb.o board.o board_app.o sernum.o spi.o descr.o ep0.o \
BOOT_OBJS = boot.o board.o sernum.o spi.o flash.o dfu.o \
dfu_common.o usb.o boot-atu2.o
ifeq ($(NAME),rzusb)
OBJS += board_rzusb.o
BOOT_OBJS += board_rzusb.o
else
OBJS += board_atusb.o
BOOT_OBJS += board_atusb.o
endif
vpath %.c usb/
CFLAGS += -Iinclude -Iusb -I.

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@ -29,39 +29,6 @@
uint8_t board_sernum[42] = { 42, USB_DT_STRING };
static void set_clkm(void)
{
/* switch CLKM to 8 MHz */
/*
* @@@ Note: Atmel advise against changing the external clock in
* mid-flight. We should therefore switch to the RC clock first, then
* crank up the external clock, and finally switch back to the external
* clock. The clock switching procedure is described in the ATmega32U2
* data sheet in secton 8.2.2.
*/
#ifdef ATUSB
spi_begin();
spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
spi_send(CLKM_CTRL_8MHz);
spi_end();
#endif
#ifdef RZUSB
spi_begin();
spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
spi_send(0x10);
spi_end();
/* TX_AUTO_CRC_ON, default disabled */
spi_begin();
spi_send(AT86RF230_REG_WRITE | 0x05);
spi_send(0x80);
spi_end();
#endif
}
void reset_rf(void)
{
/* set up all the outputs; default port value is 0 */
@ -122,7 +89,7 @@ static char hex(uint8_t nibble)
}
static void get_sernum(void)
void get_sernum(void)
{
uint8_t sig;
uint8_t i;
@ -133,26 +100,3 @@ static void get_sernum(void)
board_sernum[(i << 2)+4] = hex(sig & 0xf);
}
}
void board_init(void)
{
/* Disable the watchdog timer */
MCUSR = 0; /* Remove override */
WDTCSR |= 1 << WDCE; /* Enable change */
WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling
change */
CLKPR = 1 << CLKPCE;
#ifdef ATUSB
/* We start with a 1 MHz/8 clock. Disable the prescaler. */
CLKPR = 0;
#endif
#ifdef RZUSB
/* We start with a 16 MHz/8 clock. Put the prescaler to 2. */
CLKPR = 1 << CLKPS0;
#endif
get_sernum();
}

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@ -19,52 +19,10 @@
#include <atusb/atusb.h>
#ifdef ATUSB
#define LED_PORT B
#define LED_BIT 6
#define nRST_RF_PORT C
#define nRST_RF_BIT 7
#define SLP_TR_PORT B
#define SLP_TR_BIT 4
#define SCLK_PORT D
#define SCLK_BIT 5
#define MOSI_PORT D
#define MOSI_BIT 3
#define MISO_PORT D
#define MISO_BIT 2
#define nSS_PORT D
#define nSS_BIT 1
#define IRQ_RF_PORT D
#define IRQ_RF_BIT 0
#define SPI_WAIT_DONE() while (!(UCSR1A & 1 << RXC1))
#define SPI_DATA UDR1
#include "board_atusb.h"
#endif
#ifdef RZUSB
#define LED_PORT D
#define LED_BIT 7
#define nRST_RF_PORT B
#define nRST_RF_BIT 5
#define SLP_TR_PORT B
#define SLP_TR_BIT 4
#define SCLK_PORT B
#define SCLK_BIT 1
#define MOSI_PORT B
#define MOSI_BIT 2
#define MISO_PORT B
#define MISO_BIT 3
#define nSS_PORT B
#define nSS_BIT 0
#define IRQ_RF_PORT D
#define IRQ_RF_BIT 4
#define SPI_WAIT_DONE() while ((SPSR & (1 << SPIF)) == 0)
#define SPI_DATA SPDR
#include "board_rzusb.h"
#endif
#define SET_2(p, b) PORT##p |= 1 << (b)
@ -121,7 +79,8 @@ void timer_init(void);
bool gpio(uint8_t port, uint8_t data, uint8_t dir, uint8_t mask, uint8_t *res);
void gpio_cleanup(void);
void board_init(void);
void get_sernum(void);
void board_app_init(void);
#endif /* !BOARD_H */

60
atusb/fw/board_atusb.c Normal file
View File

@ -0,0 +1,60 @@
/*
* fw/board_atusb.c - ATUSB Board-specific functions (for boot loader and application)
*
* Written 2016 by Stefan Schmidt
* Copyright 2016 Stefan Schmidt
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <stdbool.h>
#include <stdint.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/boot.h>
#define F_CPU 8000000UL
#include <util/delay.h>
#include "usb.h"
#include "at86rf230.h"
#include "board.h"
#include "spi.h"
void set_clkm(void)
{
/* switch CLKM to 8 MHz */
/*
* @@@ Note: Atmel advise against changing the external clock in
* mid-flight. We should therefore switch to the RC clock first, then
* crank up the external clock, and finally switch back to the external
* clock. The clock switching procedure is described in the ATmega32U2
* data sheet in secton 8.2.2.
*/
spi_begin();
spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
spi_send(CLKM_CTRL_8MHz);
spi_end();
}
void board_init(void)
{
/* Disable the watchdog timer */
MCUSR = 0; /* Remove override */
WDTCSR |= 1 << WDCE; /* Enable change */
WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling
change */
CLKPR = 1 << CLKPCE;
/* We start with a 1 MHz/8 clock. Disable the prescaler. */
CLKPR = 0;
get_sernum();
}

44
atusb/fw/board_atusb.h Normal file
View File

@ -0,0 +1,44 @@
/*
* fw/board_atusb.h - ATUSB Board-specific functions and definitions
*
* Written 2016 by Stefan Schmidt
* Copyright 2016 Stefan Schmidt
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef BOARD_ATUSB_H
#define BOARD_ATUSB_H
#include <stdbool.h>
#include <stdint.h>
#define LED_PORT B
#define LED_BIT 6
#define nRST_RF_PORT C
#define nRST_RF_BIT 7
#define SLP_TR_PORT B
#define SLP_TR_BIT 4
#define SCLK_PORT D
#define SCLK_BIT 5
#define MOSI_PORT D
#define MOSI_BIT 3
#define MISO_PORT D
#define MISO_BIT 2
#define nSS_PORT D
#define nSS_BIT 1
#define IRQ_RF_PORT D
#define IRQ_RF_BIT 0
#define SPI_WAIT_DONE() while (!(UCSR1A & 1 << RXC1))
#define SPI_DATA UDR1
void set_clkm(void);
void board_init(void);
#endif /* !BOARD_H */

66
atusb/fw/board_rzusb.c Normal file
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@ -0,0 +1,66 @@
/*
* fw/board_rzusb.c - RZUSB Board-specific functions (for boot loader and application)
*
* Written 2016 by Stefan Schmidt
* Copyright 2016 Stefan Schmidt
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <stdbool.h>
#include <stdint.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/boot.h>
#define F_CPU 8000000UL
#include <util/delay.h>
#include "usb.h"
#include "at86rf230.h"
#include "board.h"
#include "spi.h"
void set_clkm(void)
{
/* switch CLKM to 8 MHz */
/*
* @@@ Note: Atmel advise against changing the external clock in
* mid-flight. We should therefore switch to the RC clock first, then
* crank up the external clock, and finally switch back to the external
* clock. The clock switching procedure is described in the ATmega32U2
* data sheet in secton 8.2.2.
*/
spi_begin();
spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
spi_send(0x10);
spi_end();
/* TX_AUTO_CRC_ON, default disabled */
spi_begin();
spi_send(AT86RF230_REG_WRITE | 0x05);
spi_send(0x80);
spi_end();
}
void board_init(void)
{
/* Disable the watchdog timer */
MCUSR = 0; /* Remove override */
WDTCSR |= 1 << WDCE; /* Enable change */
WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling
change */
CLKPR = 1 << CLKPCE;
/* We start with a 16 MHz/8 clock. Put the prescaler to 2. */
CLKPR = 1 << CLKPS0;
get_sernum();
}

44
atusb/fw/board_rzusb.h Normal file
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@ -0,0 +1,44 @@
/*
* fw/board_rzusb.h - RZUSB Board-specific functions and definitions
*
* Written 2016 by Stefan Schmidt
* Copyright 2016 Stefan Schmidt
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef BOARD_RZUSB_H
#define BOARD_RZUSB_H
#include <stdbool.h>
#include <stdint.h>
#define LED_PORT D
#define LED_BIT 7
#define nRST_RF_PORT B
#define nRST_RF_BIT 5
#define SLP_TR_PORT B
#define SLP_TR_BIT 4
#define SCLK_PORT B
#define SCLK_BIT 1
#define MOSI_PORT B
#define MOSI_BIT 2
#define MISO_PORT B
#define MISO_BIT 3
#define nSS_PORT B
#define nSS_BIT 0
#define IRQ_RF_PORT D
#define IRQ_RF_BIT 4
#define SPI_WAIT_DONE() while ((SPSR & (1 << SPIF)) == 0)
#define SPI_DATA SPDR
void set_clkm(void);
void board_init(void);
#endif /* !BOARD_H */