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mirror of git://projects.qi-hardware.com/ben-wpan.git synced 2024-07-03 02:23:51 +03:00

atusb/fw/: make timer code use interrupts instead of polling

- board_app.c (timer_poll): replaced with interrupt handler
- board_app.c (__timer_read): merged polling of timer_poll into the
  read loop (so it works as before, provided that interrupts are
  disabled)
- board_app.c (timer_read): run __timer_read with interrupts disabled
- board_app.c (timer_init): enable timer 1 overflow interrupt
- atusb.c (main): enabled global interrupts
- atusb.c (main): don't call poll_timer anymore
- board.h (timer_poll): removed
This commit is contained in:
Werner Almesberger 2011-06-11 01:59:03 -03:00
parent 2acdaca218
commit a69916da52
3 changed files with 27 additions and 11 deletions

View File

@ -14,6 +14,7 @@
#include <stdint.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include "usb.h"
@ -36,8 +37,8 @@ int main(void)
ep0_init();
timer_init();
while (1) {
sei();
while (1)
usb_poll();
timer_poll();
}
}

View File

@ -77,7 +77,6 @@ void slp_tr(void);
void led(int on);
void panic(void);
void timer_poll(void);
uint64_t timer_read(void);
void timer_init(void);

View File

@ -14,6 +14,7 @@
#include <stdint.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#define F_CPU 8000000UL
#include <util/delay.h>
@ -22,7 +23,7 @@
#include "spi.h"
static uint32_t timer_h = 0; /* 2^(16+32) / 8 MHz = ~1.1 years */
static volatile uint32_t timer_h = 0; /* 2^(16+32) / 8 MHz = ~1.1 years */
void reset_cpu(void)
@ -44,22 +45,22 @@ void slp_tr(void)
}
void timer_poll(void)
ISR(TIMER1_OVF_vect)
{
if (!(TIFR1 & (1 << TOV1)))
return;
TIFR1 = 1 << TOV1;
timer_h++;
}
uint64_t timer_read(void)
static uint64_t __timer_read(void)
{
uint32_t high;
uint8_t low, mid;
do {
timer_poll();
if (TIFR1 & (1 << TOV1)) {
TIFR1 = 1 << TOV1;
timer_h++;
}
high = timer_h;
low = TCNT1L;
mid = TCNT1H;
@ -74,12 +75,27 @@ uint64_t timer_read(void)
}
uint64_t timer_read(void)
{
uint64_t res;
cli();
res = __timer_read();
sei();
return res;
}
void timer_init(void)
{
/* configure timer 1 as a free-running CLK counter */
TCCR1A = 0;
TCCR1B = 1 << CS10;
/* enable timer overflow interrupt */
TIMSK1 = 1 << TOIE1;
}