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atusb.brd: more layout cleanup to improve solderability

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Traces leaving a pad on the side may invite solder bridges to "false pads"
exposed at the edges of the chip, with unknown consequences.

- atusb.brd: make trace from P0.0 (IRQ_RF) leave pad at the front, not
  at the side
- atusb.brd: make trave from P0.7 (SCLK) leave pad at front, not at the
  side
This commit is contained in:
Werner Almesberger 2010-12-29 17:45:50 -03:00
parent 6f956290c3
commit cec090f7b2
1 changed files with 35 additions and 23 deletions
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58
atusb/atusb.brd
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@ -1,4 +1,4 @@
PCBNEW-BOARD Version 1 date Wed Dec 29 03:32:28 2010 PCBNEW-BOARD Version 1 date Wed Dec 29 17:32:43 2010
# Created by Pcbnew(2010-12-27 BZR 2685)-unstable # Created by Pcbnew(2010-12-27 BZR 2685)-unstable
@ -10,7 +10,7 @@ Links 81
NoConn 0 NoConn 0
Di 45606 37914 53375 52126 Di 45606 37914 53375 52126
Ndraw 13 Ndraw 13
Ntrack 365 Ntrack 371
Nzone 0 Nzone 0
BoardThickness 630 BoardThickness 630
Nmodule 28 Nmodule 28
@ -1630,30 +1630,34 @@ Po 0 48464 41495 47609 41495 190 -1
De 15 0 2 0 800 De 15 0 2 0 800
Po 0 47609 41495 47600 41486 190 -1 Po 0 47609 41495 47600 41486 190 -1
De 15 0 2 0 400 De 15 0 2 0 400
Po 0 49350 45800 49350 46400 80 -1 Po 0 48110 48244 48110 48390 80 -1
De 0 0 3 0 0
Po 0 49188 45638 49350 45800 80 -1
De 15 0 3 0 0
Po 3 49350 45800 49350 45800 300 -1
De 15 1 3 0 0
Po 0 48110 48244 47556 48244 80 -1
De 15 0 3 0 800 De 15 0 3 0 800
Po 3 47500 48300 47500 48300 300 -1 Po 0 49350 46400 49850 46900 80 -1
De 15 1 3 0 0
Po 0 47556 48244 47500 48300 80 -1
De 15 0 3 0 0
Po 0 49188 45638 49188 45253 80 -1
De 15 0 3 0 400
Po 0 47550 48250 47500 48300 80 -1
De 0 0 3 0 0
Po 0 49550 48250 47550 48250 80 -1
De 0 0 3 0 0
Po 0 49850 47950 49550 48250 80 -1
De 0 0 3 0 0 De 0 0 3 0 0
Po 0 49850 46900 49850 47950 80 -1 Po 0 49850 46900 49850 47950 80 -1
De 0 0 3 0 0 De 0 0 3 0 0
Po 0 49350 46400 49850 46900 80 -1 Po 0 49850 47950 49550 48250 80 -1
De 0 0 3 0 0 De 0 0 3 0 0
Po 0 49550 48250 47550 48250 80 -1
De 0 0 3 0 0
Po 0 47550 48250 47500 48300 80 -1
De 0 0 3 0 0
Po 0 49188 45638 49188 45253 80 -1
De 15 0 3 0 400
Po 3 47500 48300 47500 48300 300 -1
De 15 1 3 0 0
Po 3 49350 45800 49350 45800 300 -1
De 15 1 3 0 0
Po 0 49188 45638 49350 45800 80 -1
De 15 0 3 0 0
Po 0 49350 45800 49350 46400 80 -1
De 0 0 3 0 0
Po 0 47700 48500 47500 48300 80 -1
De 15 0 3 0 0
Po 0 48000 48500 47700 48500 80 -1
De 15 0 3 0 0
Po 0 48110 48390 48000 48500 80 -1
De 15 0 3 0 0
Po 0 48700 46356 48700 45950 80 -1 Po 0 48700 46356 48700 45950 80 -1
De 15 0 4 0 800 De 15 0 4 0 800
Po 0 48795 45855 48795 45253 80 -1 Po 0 48795 45855 48795 45253 80 -1
@ -1748,11 +1752,19 @@ Po 0 48504 45954 48504 46356 80 -1
De 15 0 12 0 400 De 15 0 12 0 400
Po 0 48402 45852 48504 45954 80 -1 Po 0 48402 45852 48504 45954 80 -1
De 15 0 12 0 0 De 15 0 12 0 0
Po 0 47756 46710 47756 46294 80 -1 Po 0 47756 46710 47610 46710 80 -1
De 15 0 13 0 800 De 15 0 13 0 800
Po 0 48205 45845 48205 45253 80 -1 Po 0 48205 45845 48205 45253 80 -1
De 15 0 13 0 400 De 15 0 13 0 400
Po 0 47756 46294 48205 45845 80 -1 Po 0 47850 46200 48205 45845 80 -1
De 15 0 13 0 0
Po 0 47700 46200 47850 46200 80 -1
De 15 0 13 0 0
Po 0 47600 46300 47700 46200 80 -1
De 15 0 13 0 0
Po 0 47600 46700 47600 46300 80 -1
De 15 0 13 0 0
Po 0 47610 46710 47600 46700 80 -1
De 15 0 13 0 0 De 15 0 13 0 0
Po 0 47000 47250 47050 47250 80 -1 Po 0 47000 47250 47050 47250 80 -1
De 0 0 14 0 0 De 0 0 14 0 0