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atben/misc/atben-spi-performance.txt: SPI performance comparison
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atben/misc/atben-spi-performance.txt
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atben/misc/atben-spi-performance.txt
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Performance analysis of SPI drivers for ATBEN
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=============================================
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This was originally posted on April 10 2013 to the linux-zigbee and
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the qi-hardware list. The URLs have been updated for stability.
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What this is all about
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----------------------
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The ATBEN board on the Ben NanoNote needs a bit-banging SPI driver.
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There are several ways to implement this, ranging from reuse of the
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generic spi-gpio driver to an optimized driver that's specific for
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this platform.
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I implemented several such approaches and measured their performance
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in the Ben NanoNote. Below are my findings.
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Comments welcome.
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Cast and characters
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-------------------
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spi_atben_gpio: NanoNote-specific framework for setting up the
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AT86RF230/1 with SPI-GPIO or one of the optimized drivers (below).
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The name derives from spi_atben (see below) and should be changed
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(maybe to atben_spi or atben_spi_gpio ?) since it is not an SPI
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driver but merely a framework that provides configuration data and
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performs miscellaneous platform setup.
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https://github.com/wpwrak/ben-wpan-linux/blob/perfcomp/drivers/net/ieee802154/spi_atben_gpio.c
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spi_atben: like spi_atben_gpio, but contains a highly optimized
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SPI driver for the ATBEN configuration in the Ben NanoNote.
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https://github.com/wpwrak/ben-wpan-linux/blob/perfcomp/drivers/net/ieee802154/spi_atben.c
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spi-jz4740-gpio: SPI-GPIO driver optimized for the Jz4740. Uses the
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optimized register accesses from spi_atben but pin assignment is not
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restricted to ATBEN. The only limitation is that MOSI, MISO, and
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SCLK must be on the same port.
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https://github.com/wpwrak/ben-wpan-linux/blob/perfcomp/drivers/spi/spi-jz4740-gpio.c
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spi-gpio-atben: task-specific SPI-GPIO driver using the #include
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"spi-gpio.c" method. Replaces gpiolib functions with register
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accesses specific to the ATBEN configuration in the Ben NanoNote.
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Note that some of the code could be moved into Jz4740
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architecture-specific GPIO support.
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https://github.com/wpwrak/ben-wpan-linux/blob/perfcomp/drivers/spi/spi-gpio-atben.c
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In the following sections, we abbreviate the stack configurations
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as follows:
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Abbreviation Framework Transport Chip driver
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--------------- --------------- --------------- -----------
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spi-gpio spi_atben_gpio spi-gpio at86rf230
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spi-gpio-atben spi_atben_gpio spi-gpio-atben at86rf230
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spi-jz4740-gpio spi_atben_gpio spi-jz4740-gpio at86rf230
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spi_atben spi_atben at86rf230
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Measurements
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------------
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Access time to AT86RF231 registers and buffer, in microseconds, on
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an otherwise idle Ben NanoNote:
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Driver read from 0x51 read 120 bytes from buffer
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| | | read 1 byte from buffer write 120 bytes
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spi-gpio 81 85 186 1696 97 1596
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spi-gpio-atben 63 59 123 498 65 437
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spi-jz4740-gpio 10 8 21 280 10 231
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spi_atben 10 7 21 280 10 230
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Data rate for hypothetical buffer accesses of infinite length.
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I.e., kbps = 1000*119*8/(t_write120-t_write1)
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Driver buffer read (kbps) buffer write (kbps)
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--------------- ----------------------- -------------------
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spi-gpio 630 635
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spi-gpio-atben 2549 2559
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spi-jz4740-gpio 3676 4308
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spi_atben 3676 4327
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At the air interface, IEEE 802.15.4 has a data rate of 250 kbps.
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The AT86RF231 transceiver also supports non-standard higher data
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rates up to 2 Mbps.
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Driver(s) Code size (lines)
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--------------------------------------- -----------------
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spi_atben_gpio 128
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spi_atben_gpio + spi-gpio-atben 128+ 53
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spi_atben_gpio + spi-jz4740-gpio 128+416
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spi_atben 423
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Computational cost
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------------------
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The high-level operations of sending and receiving produce the
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following major low-level operations:
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Operation register buffer waitqueue
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read write read write
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--------------- ------- ------- ------- ------- ---------
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reception 1 - 1 - 1
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transmission 9 4 - 1 1
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Using the measured data from above, we get the following total
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computational overhead in microseconds, without considering the
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waitqueue scheduling delay:
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Driver reception transmission
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1 120 127 1 120 125 (bytes)
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--------------- ------- ------- ------- ------- ------- -------
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spi-gpio 267 1777 1866 1166 2665 2727
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spi-gpio-atben 186 561 583 868 1240 1256
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spi-jz4740-gpio 31 290 304 132 353 362
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Note that the minimum frame length in IEEE 802.15.4 is 5 bytes.
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The values for 125 (excluding CRC) and 127 (including CRC) bytes
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are extrapolated.
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According to [1], maximum-sized frames can be sent/received,
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including CSMA/CA and acknowledgement, at a rate between one
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every 4928 us and one every 7168 us.
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We would therefore get the following maximum CPU load:
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Driver Reception Transmission
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--------------- --------------- ------------
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spi-gpio 38% 55%
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spi-gpio-atben 12% 25%
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spi-jz4740-gpio 6% 7%
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Observations
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------------
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spi-gpio needs the smallest amount of new code but is also very
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inefficient, making it questionable whether this configuration
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would yield acceptable performance in regular use.
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With spi-gpio-atben, only a small amount of code is added, but
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buffer accesses become almost 4 times faster. Register reads and
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writes are still fairly slow.
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spi_atben and spi-jz4740-gpio both achieve the best performance
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without significant differences between them. Both add a complete
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SPI driver. Of the two, spi-jz4740-gpio is preferable, because it
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uses the nearly universal spi_atben_gpio framework driver.
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Conclusion
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I think performance trumps most other considerations in this case.
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spi-gpio is clearly too inefficient. spi_atben_gpio with
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spi-jz4740-gpio offers the best performance and has a low impact
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on the system load (< 10%). In case this solution would be met
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with strong resistance for some reason, spi-gpio-atben would offer
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a compromise between performance and the amount of code.
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References
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----------
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[1] http://www.jennic.com/files/support_files/JN-AN-1035%20Calculating%20802-15-4%20Data%20Rates-1v0.pdf
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_______________________________________________
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Qi Hardware Discussion List
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Mail to list (members only): discussion@lists.en.qi-hardware.com
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Subscribe or Unsubscribe: http://lists.en.qi-hardware.com/mailman/listinfo/discussion
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