1
0
mirror of git://projects.qi-hardware.com/ben-wpan.git synced 2024-12-23 21:41:45 +02:00
Commit Graph

3 Commits

Author SHA1 Message Date
Werner Almesberger
9ad96bd5f9 Board bringup: talk to the chip and read IDs.
- atusd/ERRATA: mention that the reset circuit can go, as expected
- atusd/tools/Makefile: add include path to at86rf230.h
- atusd/tools/lib/atusd.c: include atusd.h, for consistency checking
- atusd/tools/lib/atusd.c (spi_begin, spi_end, spi_data_in, spi_data_out,
  spi_send_partial, spi_recv, spi_finish, spi_send): low-level functions
  to access our modified SPI
- atusd/tools/lib/atusd.h, atusd/tools/lib/atusd.c (atusd_reg_write,
  atusd_reg_read): register read and write access
- atusd/tools/try.c: read and print chip IDs
2010-09-05 16:59:59 -03:00
Werner Almesberger
a18d5969bd Next part of board bringup: reset and power cycling.
- atusd/ERRATA: one more problem: the transistor footprint is wrong
- atusd/tools/lib/atusd.c (atusd_cycle, atusd_reset): added power cycling and
  hardware reset
- atusd/tools/lib/atusd.h: be nice and make a header file
- atusd/tools/try.c: be nice and use header files (caught a bug as well)
2010-09-05 14:07:01 -03:00
Werner Almesberger
86e556ce92 First part of the board bringup: power and clock.
- atusd/ERRATA: variations of the circuit being debugged from the design
- tools/Makefile, tools/try.c, tools/lib/atusd.c: user-space tool to enable
  the board and (in the future) establish communication
- atusd/sim/clk.sch: simulation of CLK attenuation circuit with capacitative
  load from scope probe
2010-09-04 23:14:57 -03:00