Current stuff ------------- - add spi_atben driver, for improved performance and to serve as an example for spi_atusb Resolution: done. Average frame buffer transfer speed increased from about 0.82 Mbps to 4.2 Mbps. Things still pending: - restore GPIOs in spi_atben - update unbinding procedure - need to document fab workflow in makefiles/Makefile.kicad Deadline: before FISL 12 :-) - boot.hex is now bigger than 4 kB. Need to split USB stack build into "lean" and "fat" version. Work-around: those wishing to build their boot loader should use commit ce16a16. Resolution: should work now (after the stack split). Still needs testing. - atusb/fw/ design flaw: we can send an interrupt queued in EP1 after a control transfer has happened that turns off the interrupt source Work-around: seems that waiting for 10 ms gets it most of the time - atusb/fw/ should combine interrupts so that we don't have to read IRQ_STATUS (this goal may conflict with the synchronization requirement above, though) Resolution: do less instead of more - we now don't even touch IRQ_STATUS in the atusb firmware and just send a zero byte as an indication that something has happened. - show WLAN channels in atrf-rssi -g Resolution: done - atusb/fw/: think of a better way to re-enable INT0 after ATUSB_GPIO - atusb/fw/: remove obsolete atusb requests *** EVERYTHING BELOW NEEDS UPDATING *** General ======= Things not done yet ------------------- - document directory hierarchy - make sure all files have a copyright header or are listed in AUTHORS - connect all the bits and pieces of the build system - combine io-parts.h generation - combine "standard" EP0 commands, such as *_ID and *_BUILD - implement return to DFU in application's EP0 protocol - consider removing *_ID and using bcdDevice instead Bugs to fix ----------- - builds fail if .version isn't there yet atrf ==== AT86RF230-based IEEE 802.15.4 transceiver. Two variants: one to make a USB dongle for use with any Linux host, and one that connects with SPI directly inside a Ben. Update: following Rikard Lindstrom's revelation that we can use the uSD slot also just as general GPIOs, the variant that goes inside the Ben can wait a bit and the atben board for insertion into the uSD slot is being worked on first. We can verify most of the design of a fully integrated board with the atben board and the latter will be of greater immediate use. Things done ----------- - verify that the Ben can output an a) 16 MHz clock, and b) with +/- 40 ppm Done, see ecn/ecn0005.txt. Works fine. - replace discrete balun and filter with integrated solution, to reduce BOM size, maybe cost, insertion loss, and PCB space (see ATRF/ECN0003) Done for atben. At a first glamce, does not seem to affect performance. - check if we really need three DC blocking caps in the RF path Reduced to two in atben without apparent ill effects. Things not done yet ------------------- - examine spectrum around carrier frequency and first harmonic to look for obvious distortions. Vary transmit power. - measure throughput as a function of placement/distance, carrier frequency, and transmit power - atrf-txrx: suppport "extended mode" with IEEE 802.15.4 CSMA-CA for more realistic throughput figures - measure full spectrum (ideally up to 25 GHz, but just 2nd and 3rd harmonic will already tell most of the story) with calibrated antenna for FCC/ETSI compliance assessment. Vary transmit power. - use IEEE 802.15.4 stack from linux-zigbee. The linux-zigbee kernel is currently at 2.6.35. Once 2.6.36 is released, we should have Ben and IEEE 802.15.4 support in the same kernel without further ado. - change layout of transceiver side of the board for placement inside Ben - define EMI filters for placement inside Ben - check USB standard for recommended USB dongle dimensions - change layout for straight USB dongle - generate proper BOM - implement sleep mode - (atben) verify SPI signal timing, particularly the data clock ccrf ==== Board similar to the atrf, but with the TI/Chipcon CC2520. Cancelled. The CC2520 falls under US export restrictions, apparently because it contains an AES engine. cntr ==== Simple USB-based counter to measure a clock's long-time accuracy with arbitrarily high precision, by comparing it to an NTP time reference. Things not done yet ------------------- - measure duty cycle - use the LED to display activity on clock input and duty cycle - consider using a comparator and a DAC to allow for programmable logic levels - evaluate termination resistance - document circuit design - record beats between 16 bit counter polls and use them for the estimate of lost cycles (2*1 is way too optimistic) - include system clock resolution in accuracy calculation - consider running shorter sliding windows to estimate drift - consider detecting unusual half-periods - consider using a reversed USB connector, to avoid having to cross D+/D- and, worse, VBUS and GND - test input performance by counting a source that emits a known number of cycles - consider using historical margins to sanity-check the current margin (if any old.max < curr.min or old.min > curr.max, we have a problem) and to further narrow the effective margin, thus achieving faster convergence. We would have to consider temperature drift of the frequency source in this case. - find out why frequency measurements always seem to start high and then slowly drop