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mirror of git://projects.qi-hardware.com/ben-wpan.git synced 2024-11-05 12:34:05 +02:00
ben-wpan/atusd/sim
Werner Almesberger 6e726d1fb9 Improved clock stability by using a capacitative divider and found more minor
issues.

- atusd/ERRATA: work around the clock instability by replacing the
  resistive divider with a capacitative divider
- atusd/ERRATA: a ground plane under the clock circuit would also be good to
  have
- atusd/ERRATA: via near pin 1 is too close to the chip if we need to cut
  wires (in DIY boards)
- atusd/sim/cdiv.sch: simulation of the capacitative divider
2010-09-09 12:35:47 -03:00
..
cdiv.sch Improved clock stability by using a capacitative divider and found more minor 2010-09-09 12:35:47 -03:00
clk.sch First part of the board bringup: power and clock. 2010-09-04 23:14:57 -03:00