mirror of
git://projects.qi-hardware.com/ben-wpan.git
synced 2024-11-23 04:45:19 +02:00
8c57277953
- atusb.c (main): poll the 16 bit timer for overflows - board.h (timer_poll, timer_read), (board.c (timer_h, timer_poll, timer_read, board_init): added support for a free-running 48 bit timer (16 bits in hardware, 32 bits in software) - include/atusb/ep0.h (ATUSB_TIMER), ep0.c (my_setup): new request ATUSB_TIMER to retrieve the value of the 8 MHz counter - include/atusb/ep0.h (enum atspi_requests): describe what the groups of requests do
181 lines
3.1 KiB
C
181 lines
3.1 KiB
C
/*
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* fw/board.c - Board-specific functions
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*
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* Written 2011 by Werner Almesberger
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* Copyright 2011 Werner Almesberger
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <stdint.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <avr/boot.h>
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#define F_CPU 8000000UL
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#include <util/delay.h>
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#include "usb.h"
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#include "at86rf230.h"
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#include "board.h"
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#include "spi.h"
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uint8_t board_sernum[42] = { 42, USB_DT_STRING };
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static uint32_t timer_h = 0; /* 2^(16+32) / 8 MHz = ~1.1 years */
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static void set_clkm(void)
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{
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/* switch CLKM to 8 MHz */
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/*
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* @@@ Note: Atmel advise against changing the external clock in
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* mid-flight. We should therefore switch to the RC clock first, then
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* crank up the external clock, and finally switch back to the external
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* clock. The clock switching procedure is described in the ATmega32U2
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* data sheet in secton 8.2.2.
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*/
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spi_begin();
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spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
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spi_send(CLKM_CTRL_8MHz);
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spi_end();
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}
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void reset_rf(void)
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{
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/* AT86RF231 data sheet, 12.4.13, reset pulse width: 625 ns (min) */
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CLR(nRST_RF);
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_delay_us(1);
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SET(nRST_RF);
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/* 12.4.14: SPI access latency after reset: 625 ns (min) */
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_delay_us(1);
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/* we must restore TRX_CTRL_0 after each reset (9.6.4) */
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set_clkm();
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}
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void reset_cpu(void)
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{
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WDTCSR = 1 << WDE;
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}
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uint8_t read_irq(void)
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{
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return PIN(IRQ_RF);
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}
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void led(int on)
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{
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if (on)
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SET(LED);
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else
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CLR(LED);
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}
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void panic(void)
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{
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cli();
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while (1) {
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SET(LED);
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_delay_ms(100);
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CLR(LED);
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_delay_ms(100);
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}
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}
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void timer_poll(void)
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{
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if (!(TIFR1 & (1 << TOV1)))
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return;
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TIFR1 = 1 << TOV1;
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timer_h++;
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}
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uint64_t timer_read(void)
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{
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uint32_t high;
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uint8_t low, mid;
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do {
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timer_poll();
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high = timer_h;
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low = TCNT1L;
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mid = TCNT1H;
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}
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while (TIFR1 & (1 << TOV1));
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/*
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* We need all these casts because the intermediate results are handled
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* as if they were signed and thus get sign-expanded. Sounds wrong-ish.
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*/
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return (uint64_t) high << 16 | (uint64_t) mid << 8 | (uint64_t) low;
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}
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static char hex(uint8_t nibble)
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{
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return nibble < 10 ? '0'+nibble : 'a'+nibble-10;
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}
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static void get_sernum(void)
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{
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uint8_t sig;
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int i;
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for (i = 0; i != 10; i++) {
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sig = boot_signature_byte_get(i+0xe);
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board_sernum[(i << 2)+2] = hex(sig >> 4);
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board_sernum[(i << 2)+4] = hex(sig & 0xf);
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}
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}
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void board_init(void)
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{
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/* Disable the watchdog timer */
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MCUSR = 0; /* Remove override */
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WDTCSR |= 1 << WDCE; /* Enable change */
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WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling
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change */
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/* We start with a 1 MHz/8 clock. Disable the prescaler. */
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CLKPR = 1 << CLKPCE;
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CLKPR = 0;
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/* set up all the outputs; default port value is 0 */
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OUT(LED);
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OUT(nRST_RF); /* this also resets the transceiver */
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OUT(SLP_TR);
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/* configure timer 1 as a free-running CLK counter */
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TCCR1A = 0;
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TCCR1B = 1 << CS10;
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get_sernum();
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}
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