mirror of
git://projects.qi-hardware.com/ben-wpan.git
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e8b68041a5
- atusb.c (main), board.c (set_clkm): moved CLKM initialization to board.c - board.c (reset_rf): initialize the CLKM after each transceiver reset
54 lines
984 B
C
54 lines
984 B
C
#include <stdint.h>
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#include <avr/io.h>
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#define F_CPU 8000000UL
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#include <util/delay.h>
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#include "at86rf230.h"
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#include "board.h"
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#include "spi.h"
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static void set_clkm(void)
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{
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/* switch CLKM to 8 MHz */
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/*
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* @@@ Note: Atmel advise against changing the external clock in
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* mid-flight. We should therefore switch to the RC clock first, then
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* crank up the external clock, and finally switch back to the external
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* clock. The clock switching procedure is described in the ATmega32U2
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* data sheet in secton 8.2.2.
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*/
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spi_begin();
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spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
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spi_send(CLKM_CTRL_8MHz);
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spi_end();
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}
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void reset_rf(void)
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{
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/* AT86RF231 data sheet, 12.4.13, reset pulse width: 625 ns (min) */
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CLR(nRST_RF);
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_delay_us(1);
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SET(nRST_RF);
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/* 12.4.14: SPI access latency after reset: 625 ns (min) */
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_delay_us(1);
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/* we must restore TRX_CTRL_0 after each reset (9.6.4) */
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set_clkm();
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}
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uint8_t read_irq(void)
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{
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return PIN(IRQ_RF);
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}
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