mirror of
git://projects.qi-hardware.com/ben-wpan.git
synced 2024-11-30 01:51:57 +02:00
6e726d1fb9
issues. - atusd/ERRATA: work around the clock instability by replacing the resistive divider with a capacitative divider - atusd/ERRATA: a ground plane under the clock circuit would also be good to have - atusd/ERRATA: via near pin 1 is too close to the chip if we need to cut wires (in DIY boards) - atusd/sim/cdiv.sch: simulation of the capacitative divider
48 lines
1.7 KiB
XML
48 lines
1.7 KiB
XML
<Qucs Schematic 0.0.15>
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<Properties>
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<View=0,-120,870,882,1,0,0>
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<Grid=10,10,1>
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<DataSet=cdiv.dat>
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<DataDisplay=cdiv.dpl>
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<OpenDisplay=1>
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<showFrame=0>
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<FrameText0=Title>
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<FrameText1=Drawn By:>
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<FrameText2=Date:>
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<FrameText3=Revision:>
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</Properties>
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<Symbol>
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</Symbol>
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<Components>
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<GND * 1 220 400 0 0 0 0>
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<GND * 1 100 400 0 0 0 0>
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<Vrect V1 1 100 310 18 -26 0 1 "3.3 V" 1 "31 ns" 1 "31 ns" 1 "1 ns" 0 "1 ns" 0 "0 ns" 0>
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<.DC DC1 1 120 40 0 36 0 0 "26.85" 0 "0.001" 0 "1 pA" 0 "1 uV" 0 "no" 0 "150" 0 "no" 0 "none" 0 "CroutLU" 0>
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<.TR TR1 1 310 40 0 57 0 0 "lin" 1 "0" 1 "1 us" 1 "10000" 0 "Trapezoidal" 0 "2" 0 "1 ns" 0 "1e-16" 0 "150" 0 "0.001" 0 "1 pA" 0 "1 uV" 0 "26.85" 0 "1e-3" 0 "1e-6" 0 "1" 0 "CroutLU" 0 "no" 0 "yes" 0 "0" 0>
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<C C1 1 220 350 17 -26 0 1 "220 pF" 1 "" 0 "neutral" 0>
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<R R1 1 150 200 -26 15 0 0 "50 Ohm" 1 "26.85" 0 "0.0" 0 "0.0" 0 "26.85" 0 "european" 0>
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<C C2 1 220 250 17 -26 0 1 " 33 pF" 1 "" 0 "neutral" 0>
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</Components>
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<Wires>
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<100 340 100 400 "" 0 0 0 "">
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<220 280 220 320 "Vout" 250 270 17 "">
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<220 380 220 400 "" 0 0 0 "">
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<100 200 100 280 "" 0 0 0 "">
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<100 200 120 200 "" 0 0 0 "">
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<180 200 220 200 "" 0 0 0 "">
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<220 200 220 220 "" 0 0 0 "">
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</Wires>
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<Diagrams>
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<Rect 360 416 414 196 3 #c0c0c0 1 00 1 0 0.2 1 1 -0.1 0.5 1.1 1 -0.1 0.5 1.1 315 0 225 "" "" "">
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<"Vout.Vt" #0000ff 0 3 0 0 0>
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</Rect>
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<Rect 360 683 421 203 3 #c0c0c0 1 00 1 0 0.2 1 1 -0.1 0.5 1.1 1 -0.1 0.5 1.1 315 0 225 "" "" "">
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<"V1.It" #0000ff 0 3 0 0 0>
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</Tab>
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</Diagrams>
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<Paintings>
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</Paintings>
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