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ben-wpan/atusd/atusd.cmp
Werner Almesberger f17613bc69 Applied clock voltage divider fix and corrected too closely spaced via.
- atusd/atusd.sch, atusd/atusd.cmp, atusd/atusd.brd: changed resistive
  clock voltage divider to capacitative
- atusd/atusd.brd: moved via near pin 1 and rearranged ground planes
  accordingly
- atusd/atusd.sch, atusd/atusd.brd: bumped version number to 20100911
- atusd/atusd.pro: KiCad commit noise
2010-09-11 17:08:25 -03:00

109 lines
1.5 KiB
Plaintext

Cmp-Mod V01 Created by CvPCB (2010-08-11 BZR 2448)-unstable date = Sat Sep 11 16:58:23 2010
BeginCmp
TimeStamp = /4C63FE17;
Reference = ANT1;
ValeurCmp = 50R;
IdModule = meander;
EndCmp
BeginCmp
TimeStamp = /4C7FE8A6;
Reference = B1;
ValeurCmp = 748421245;
IdModule = 0805-6;
EndCmp
BeginCmp
TimeStamp = /4C7FBF1B;
Reference = C1;
ValeurCmp = 22pF;
IdModule = 0402-M;
EndCmp
BeginCmp
TimeStamp = /4C7FBF1E;
Reference = C2;
ValeurCmp = 22pF;
IdModule = 0402-M;
EndCmp
BeginCmp
TimeStamp = /4C640A76;
Reference = C3;
ValeurCmp = 1uF;
IdModule = 0402-M;
EndCmp
BeginCmp
TimeStamp = /4C641004;
Reference = C4;
ValeurCmp = 1uF;
IdModule = 0402-M;
EndCmp
BeginCmp
TimeStamp = /4C640A84;
Reference = C5;
ValeurCmp = 1uF;
IdModule = 0402-M;
EndCmp
BeginCmp
TimeStamp = /4C640A7E;
Reference = C6;
ValeurCmp = 1uF;
IdModule = 0402-M;
EndCmp
BeginCmp
TimeStamp = /4C7FBD45;
Reference = C7;
ValeurCmp = 33pF;
IdModule = 0402-M;
EndCmp
BeginCmp
TimeStamp = /4C8BDEB3;
Reference = C8;
ValeurCmp = 220pF;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C7FCA54;
Reference = L1;
ValeurCmp = 0R;
IdModule = 0402-M;
EndCmp
BeginCmp
TimeStamp = /4C640CD5;
Reference = P1;
ValeurCmp = TST;
IdModule = PAD_60x60;
EndCmp
BeginCmp
TimeStamp = /4C7FB8B3;
Reference = P2;
ValeurCmp = CONN_8;
IdModule = uSD-Card;
EndCmp
BeginCmp
TimeStamp = /4C7FBDBD;
Reference = R1;
ValeurCmp = 0R;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C609C4B;
Reference = U1;
ValeurCmp = AT86RF230;
IdModule = QFN32;
EndCmp
EndListe