1
0
mirror of git://projects.qi-hardware.com/ben-wpan.git synced 2024-11-16 23:11:55 +02:00
ben-wpan/atusb/fw/board.c
Werner Almesberger 85f60de9d5 atusb/fw: use the unique serial number of the ATmega8/16/32U2 for iSerialNumber
- usb/usb.h (USB_LANGID_ENGLISH_US): added USB LANGID for US-English
- board.h (board_sernum), board.c (board_sernum, hex, get_sernum,
  board_init): provide the board's serial number in "board_sernum"
  (UTF-encoded)
- sernum.h (sernum_get_descr), sernum.c (sernum_get_descr): return
  string descriptors for the serial number
- descr.c (device_descriptor), usb/dfu.c (device_descriptor):
  set iSerialNumber if serial number is available
- atusb.c (main), usb/dfu.c (my_descr): call sernum_get_descr for
  unknown descriptors
- Makefile (OBJS, BOOT_OBJS): added sernum.o
2011-05-10 17:23:08 -03:00

143 lines
2.4 KiB
C

/*
* fw/board.c - Board-specific functions
*
* Written 2011 by Werner Almesberger
* Copyright 2011 Werner Almesberger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <stdint.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/boot.h>
#define F_CPU 8000000UL
#include <util/delay.h>
#include "usb.h"
#include "at86rf230.h"
#include "board.h"
#include "spi.h"
uint8_t board_sernum[42] = { 42, USB_DT_STRING };
static void set_clkm(void)
{
/* switch CLKM to 8 MHz */
/*
* @@@ Note: Atmel advise against changing the external clock in
* mid-flight. We should therefore switch to the RC clock first, then
* crank up the external clock, and finally switch back to the external
* clock. The clock switching procedure is described in the ATmega32U2
* data sheet in secton 8.2.2.
*/
spi_begin();
spi_send(AT86RF230_REG_WRITE | REG_TRX_CTRL_0);
spi_send(CLKM_CTRL_8MHz);
spi_end();
}
void reset_rf(void)
{
/* AT86RF231 data sheet, 12.4.13, reset pulse width: 625 ns (min) */
CLR(nRST_RF);
_delay_us(1);
SET(nRST_RF);
/* 12.4.14: SPI access latency after reset: 625 ns (min) */
_delay_us(1);
/* we must restore TRX_CTRL_0 after each reset (9.6.4) */
set_clkm();
}
void reset_cpu(void)
{
WDTCSR = 1 << WDE;
}
uint8_t read_irq(void)
{
return PIN(IRQ_RF);
}
void led(int on)
{
if (on)
SET(LED);
else
CLR(LED);
}
void panic(void)
{
cli();
while (1) {
SET(LED);
_delay_ms(100);
CLR(LED);
_delay_ms(100);
}
}
static char hex(uint8_t nibble)
{
return nibble < 10 ? '0'+nibble : 'a'+nibble-10;
}
static void get_sernum(void)
{
uint8_t sig;
int i;
for (i = 0; i != 10; i++) {
sig = boot_signature_byte_get(i+0xe);
board_sernum[(i << 2)+2] = hex(sig >> 4);
board_sernum[(i << 2)+4] = hex(sig & 0xf);
}
}
void board_init(void)
{
/* Disable the watchdog timer */
MCUSR = 0; /* Remove override */
WDTCSR |= 1 << WDCE; /* Enable change */
WDTCSR = 1 << WDCE; /* Disable watchdog while still enabling
change */
/* We start with a 1 MHz/8 clock. Disable the prescaler. */
CLKPR = 1 << CLKPCE;
CLKPR = 0;
/* set up all the outputs; default port value is 0 */
OUT(LED);
OUT(nRST_RF); /* this also resets the transceiver */
OUT(SLP_TR);
get_sernum();
}