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- atusd/ERRATA: variations of the circuit being debugged from the design - tools/Makefile, tools/try.c, tools/lib/atusd.c: user-space tool to enable the board and (in the future) establish communication - atusd/sim/clk.sch: simulation of CLK attenuation circuit with capacitative load from scope probe
8 lines
100 B
Makefile
8 lines
100 B
Makefile
CC=mipsel-openwrt-linux-gcc
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CFLAGS=-Wall
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MAIN = try
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OBJS = $(MAIN).c lib/atusd.o
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$(MAIN): $(OBJS)
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