mirror of
git://projects.qi-hardware.com/ben-wpan.git
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180 lines
4.9 KiB
Plaintext
180 lines
4.9 KiB
Plaintext
Current stuff
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-------------
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- add spi_atben driver, for improved performance and to serve as an
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example for spi_atusb
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- need to document fab workflow in makefiles/Makefile.kicad
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Deadline: before FISL 12 :-)
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- boot.hex is now bigger than 4 kB. Need to split USB stack build into
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"lean" and "fat" version.
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Work-around: those wishing to build their boot loader should use
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commit ce16a16.
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- atusb/fw/ design flaw: we can send an interrupt queued in EP1 after
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a control transfer has happened that turns off the interrupt source
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Work-around: none
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- atusb/fw/ should combine interrupts so that we don't have to read
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IRQ_STATUS (this goal may conflict with the synchronization
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requirement above, though)
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- show WLAN channels in atrf-rssi -g
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- atusb/fw/: think of a better way to re-enable INT0 after ATUSB_GPIO
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- atusb/fw/: remove obsolete atusb requests
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*** EVERYTHING BELOW NEEDS UPDATING ***
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General
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=======
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Things not done yet
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-------------------
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- document directory hierarchy
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- make sure all files have a copyright header or are listed in AUTHORS
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- connect all the bits and pieces of the build system
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- combine io-parts.h generation
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- combine "standard" EP0 commands, such as *_ID and *_BUILD
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- implement return to DFU in application's EP0 protocol
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- consider removing *_ID and using bcdDevice instead
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Bugs to fix
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-----------
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- builds fail if .version isn't there yet
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atrf
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====
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AT86RF230-based IEEE 802.15.4 transceiver. Two variants: one to make a USB
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dongle for use with any Linux host, and one that connects with SPI directly
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inside a Ben.
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Update: following Rikard Lindstrom's revelation that we can use the uSD slot
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also just as general GPIOs, the variant that goes inside the Ben can wait a
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bit and the atben board for insertion into the uSD slot is being worked on
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first. We can verify most of the design of a fully integrated board with the
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atben board and the latter will be of greater immediate use.
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Things done
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-----------
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- verify that the Ben can output an a) 16 MHz clock, and b) with +/- 40 ppm
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Done, see ecn/ecn0005.txt. Works fine.
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- replace discrete balun and filter with integrated solution, to reduce BOM
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size, maybe cost, insertion loss, and PCB space (see ATRF/ECN0003)
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Done for atben. At a first glamce, does not seem to affect performance.
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- check if we really need three DC blocking caps in the RF path
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Reduced to two in atben without apparent ill effects.
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Things not done yet
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-------------------
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- examine spectrum around carrier frequency and first harmonic to look for
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obvious distortions. Vary transmit power.
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- measure throughput as a function of placement/distance, carrier frequency,
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and transmit power
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- atrf-txrx: suppport "extended mode" with IEEE 802.15.4 CSMA-CA for more
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realistic throughput figures
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- measure full spectrum (ideally up to 25 GHz, but just 2nd and 3rd harmonic
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will already tell most of the story) with calibrated antenna for FCC/ETSI
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compliance assessment. Vary transmit power.
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- use IEEE 802.15.4 stack from linux-zigbee. The linux-zigbee kernel is
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currently at 2.6.35. Once 2.6.36 is released, we should have Ben and
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IEEE 802.15.4 support in the same kernel without further ado.
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- change layout of transceiver side of the board for placement inside Ben
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- define EMI filters for placement inside Ben
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- check USB standard for recommended USB dongle dimensions
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- change layout for straight USB dongle
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- generate proper BOM
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- implement sleep mode
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- (atben) verify SPI signal timing, particularly the data clock
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ccrf
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====
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Board similar to the atrf, but with the TI/Chipcon CC2520.
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Cancelled. The CC2520 falls under US export restrictions, apparently because
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it contains an AES engine.
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cntr
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====
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Simple USB-based counter to measure a clock's long-time accuracy with
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arbitrarily high precision, by comparing it to an NTP time reference.
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Things not done yet
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-------------------
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- measure duty cycle
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- use the LED to display activity on clock input and duty cycle
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- consider using a comparator and a DAC to allow for programmable logic levels
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- evaluate termination resistance
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- document circuit design
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- record beats between 16 bit counter polls and use them for the estimate
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of lost cycles (2*1 is way too optimistic)
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- include system clock resolution in accuracy calculation
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- consider running shorter sliding windows to estimate drift
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- consider detecting unusual half-periods
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- consider using a reversed USB connector, to avoid having to cross D+/D- and,
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worse, VBUS and GND
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- test input performance by counting a source that emits a known number of
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cycles
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- consider using historical margins to sanity-check the current margin (if any
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old.max < curr.min or old.min > curr.max, we have a problem) and to further
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narrow the effective margin, thus achieving faster convergence. We would have
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to consider temperature drift of the frequency source in this case.
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- find out why frequency measurements always seem to start high and then slowly
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drop
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