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ben-wpan/atusd/tools/Makefile
Werner Almesberger 86e556ce92 First part of the board bringup: power and clock.
- atusd/ERRATA: variations of the circuit being debugged from the design
- tools/Makefile, tools/try.c, tools/lib/atusd.c: user-space tool to enable
  the board and (in the future) establish communication
- atusd/sim/clk.sch: simulation of CLK attenuation circuit with capacitative
  load from scope probe
2010-09-04 23:14:57 -03:00

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Makefile

CC=mipsel-openwrt-linux-gcc
CFLAGS=-Wall
MAIN = try
OBJS = $(MAIN).c lib/atusd.o
$(MAIN): $(OBJS)