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3533e0463c
board. - atusd/atusd.sch, atusd/atusd.brd: separate MISO and MOSI and free the extra signal we need by no longer connecting SLP_TR to the host - atusd/atusd.sch, atusd/atusd.cmp, atusd/atusd.brd: removed reset circuit Power-on reset seems to be sufficient. - atusd/atusd.brd: improved AVDD ground plane - cam/pcb.pl (rot): cut counter-clockwise to reduce burr - cam/pcb.pl: advanced origin for 2nd run
13 lines
341 B
Plaintext
13 lines
341 B
Plaintext
TXRX uSD Net TP GPIO FUNC
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------- ------- -------------- ------ ------
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IRQ DAT2 SDD2 TP14 PD12 MSC_D2
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nSEL DAT3/CD SDD3 TP15 PD13 MSC_D3
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MOSI CMD SDCMD TP17 PD08 CMD
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VDD VDD SDPWEN* TP11* PD02* -
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XTAL1 CLK SDCLK TP16 PD09 CLK
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VSS VSS - - - -
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MISO DAT0 SDD0 TP12 PD10 MSC_D0
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SCLK DAT1 SDD1 TP13 PD11 MSC_D1
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* = control, active-low
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