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Werner Almesberger cec090f7b2 atusb.brd: more layout cleanup to improve solderability
Traces leaving a pad on the side may invite solder bridges to "false pads"
exposed at the edges of the chip, with unknown consequences.

- atusb.brd: make trace from P0.0 (IRQ_RF) leave pad at the front, not
  at the side
- atusb.brd: make trave from P0.7 (SCLK) leave pad at front, not at the
  side
2010-12-29 17:45:50 -03:00
..
2010-12-01 11:08:41 -03:00