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mirror of git://projects.qi-hardware.com/ben-wpan.git synced 2024-07-17 02:48:46 +03:00
ben-wpan/atusd/atusd.pro
Werner Almesberger f17613bc69 Applied clock voltage divider fix and corrected too closely spaced via.
- atusd/atusd.sch, atusd/atusd.cmp, atusd/atusd.brd: changed resistive
  clock voltage divider to capacitative
- atusd/atusd.brd: moved via near pin 1 and rearranged ground planes
  accordingly
- atusd/atusd.sch, atusd/atusd.brd: bumped version number to 20100911
- atusd/atusd.pro: KiCad commit noise
2010-09-11 17:08:25 -03:00

76 lines
1.1 KiB
INI

update=Sat Sep 11 17:06:55 2010
last_client=pcbnew
[eeschema]
version=1
LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15
HPGLNum=1
offX_A4=0
offY_A4=0
offX_A3=0
offY_A3=0
offX_A2=0
offY_A2=0
offX_A1=0
offY_A1=0
offX_A0=0
offY_A0=0
offX_A=0
offY_A=0
offX_B=0
offY_B=0
offX_C=0
offY_C=0
offX_D=0
offY_D=0
offX_E=0
offY_E=0
RptD_X=0
RptD_Y=100
RptLab=1
SimCmd=
UseNetN=0
LabSize=60
PrintMonochrome=1
ShowSheetReferenceAndTitleBlock=1
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=conn
LibName4=../components/at86rf230
LibName5=../components/antenna
LibName6=../components/balun
[cvpcb]
version=1
NetIExt=net
[cvpcb/libraries]
EquName1=devcms
[pcbnew]
version=1
PadDrlX=320
PadDimH=600
PadDimV=600
BoardThickness=630
SgPcb45=1
TxtPcbV=600
TxtPcbH=600
TxtModV=600
TxtModH=600
TxtModW=120
VEgarde=100
DrawLar=150
EdgeLar=50
TxtLar=100
MSegLar=150
LastNetListRead=atusd.net
[pcbnew/libraries]
LibDir=
LibName1=../modules/meander
LibName2=../modules/pads
LibName3=../modules/qfn
LibName4=../../kicad-libs/modules/stdpass
LibName5=../../kicad-libs/modules/usd-card
LibName6=../modules/0805-6