mirror of
git://projects.qi-hardware.com/iris.git
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327 lines
11 KiB
Plaintext
327 lines
11 KiB
Plaintext
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#pypp 0
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// Iris: micro-kernel for a capability-based operating system.
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// lcd.ccp: Display driver.
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// Copyright 2009 Bas Wijnen <wijnen@debian.org>
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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#include "iris.h"
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// gpio stuff
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#define D(n) (*(volatile unsigned *)(0x00 + 0x30 * n + gpio_address))
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#define DI(n) (*(volatile unsigned *)(0x04 + 0x30 * n + gpio_address))
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#define PU(n) (*(volatile unsigned *)(0x0c + 0x30 * n + gpio_address))
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#define AL(n) (*(volatile unsigned *)(0x10 + 0x30 * n + gpio_address))
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#define AU(n) (*(volatile unsigned *)(0x14 + 0x30 * n + gpio_address))
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#define IE(n) (*(volatile unsigned *)(0x20 + 0x30 * n + gpio_address))
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// pwm stuff
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#define CTR (*(volatile unsigned char *)(pwm_address + 0x00))
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#define PER (*(volatile unsigned short *)(pwm_address + 0x04))
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#define DUT (*(volatile unsigned short *)(pwm_address + 0x08))
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#define CPM_MSCR (*(volatile unsigned *)(cpm_address + 0x20))
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// Mapping address for I/O memory.
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unsigned const gpio_address = 0x00001000
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unsigned const pwm_address = 0x00002000
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unsigned const lcd_address = 0x00003000
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unsigned const cpm_address = 0x00004000
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//#define PWM0_BASE 0xB0050000
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//#define PWM1_BASE 0xB0051000
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/* PWM Control Register (PWM_CTR) */
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//#define PWM_CTR_EN (1 << 7)
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//#define PWM_CTR_SD (1 << 6)
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//#define PWM_CTR_PRESCALE_MASK 0x3f
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/* PWM Period Register (PWM_PER) */
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//#define PWM_PER_PERIOD_MASK 0x3ff
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/* PWM Duty Register (PWM_DUT) */
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//#define PWM_DUT_FDUTY (1 << 10)
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//#define PWM_DUT_DUTY_MASK 0x3ff
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// Pin definitions, all in port 2.
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#define PWM_ENABLE (1 << 30)
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#define SPEN (1 << 0) //LCD_SPL
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#define SPCK (1 << 1) //LCD_CLS
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#define SPDA (1 << 2) //LCD_PS
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#define LCD_RET (1 << 3) //LCD_REV //use for lcd reset
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// Lcd register definitions.
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#define LCD_CFG (*(volatile unsigned *)(lcd_address + 0x00))
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#define LCD_VSYNC (*(volatile unsigned *)(lcd_address + 0x04))
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#define LCD_HSYNC (*(volatile unsigned *)(lcd_address + 0x08))
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#define LCD_VAT (*(volatile unsigned *)(lcd_address + 0x0c))
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#define LCD_DAH (*(volatile unsigned *)(lcd_address + 0x10))
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#define LCD_DAV (*(volatile unsigned *)(lcd_address + 0x14))
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#define LCD_PS (*(volatile unsigned *)(lcd_address + 0x18))
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#define LCD_CLS (*(volatile unsigned *)(lcd_address + 0x1c))
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#define LCD_SPL (*(volatile unsigned *)(lcd_address + 0x20))
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#define LCD_REV (*(volatile unsigned *)(lcd_address + 0x24))
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#define LCD_CTRL (*(volatile unsigned *)(lcd_address + 0x30))
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#define LCD_STATE (*(volatile unsigned *)(lcd_address + 0x34))
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#define LCD_IID (*(volatile unsigned *)(lcd_address + 0x38))
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#define LCD_DA0 (*(volatile unsigned *)(lcd_address + 0x40))
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#define LCD_SA0 (*(volatile unsigned *)(lcd_address + 0x44))
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#define LCD_FID0 (*(volatile unsigned *)(lcd_address + 0x48))
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#define LCD_CMD0 (*(volatile unsigned *)(lcd_address + 0x4c))
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#define LCD_DA1 (*(volatile unsigned *)(lcd_address + 0x50))
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#define LCD_SA1 (*(volatile unsigned *)(lcd_address + 0x54))
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#define LCD_FID1 (*(volatile unsigned *)(lcd_address + 0x58))
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#define LCD_CMD1 (*(volatile unsigned *)(lcd_address + 0x5c))
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// Bit definitions.
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#define LCD_CFG_PDW_BIT 4
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#define LCD_CFG_PDW_MASK (0x03 << LCD_DEV_PDW_BIT)
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#define LCD_CFG_PDW_1 (0 << LCD_DEV_PDW_BIT)
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#define LCD_CFG_PDW_2 (1 << LCD_DEV_PDW_BIT)
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#define LCD_CFG_PDW_4 (2 << LCD_DEV_PDW_BIT)
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#define LCD_CFG_PDW_8 (3 << LCD_DEV_PDW_BIT)
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#define LCD_CFG_MODE_BIT 0
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#define LCD_CFG_MODE_MASK (0x0f << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_GENERIC_TFT (0 << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_SHARP_HR (1 << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_CASIO_TFT (2 << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_SAMSUNG_ALPHA (3 << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_NONINTER_CCIR656 (4 << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_INTER_CCIR656 (5 << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_SINGLE_CSTN (8 << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_SINGLE_MSTN (9 << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_DUAL_CSTN (10 << LCD_DEV_MODE_BIT)
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#define LCD_CFG_MODE_DUAL_MSTN (11 << LCD_DEV_MODE_BIT)
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#define LCD_VSYNC_VPS_BIT 16
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#define LCD_VSYNC_VPS_MASK (0xffff << LCD_VSYNC_VPS_BIT)
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#define LCD_VSYNC_VPE_BIT 0
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#define LCD_VSYNC_VPE_MASK (0xffff << LCD_VSYNC_VPS_BIT)
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#define LCD_HSYNC_HPS_BIT 16
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#define LCD_HSYNC_HPS_MASK (0xffff << LCD_HSYNC_HPS_BIT)
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#define LCD_HSYNC_HPE_BIT 0
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#define LCD_HSYNC_HPE_MASK (0xffff << LCD_HSYNC_HPE_BIT)
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#define LCD_VAT_HT_BIT 16
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#define LCD_VAT_HT_MASK (0xffff << LCD_VAT_HT_BIT)
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#define LCD_VAT_VT_BIT 0
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#define LCD_VAT_VT_MASK (0xffff << LCD_VAT_VT_BIT)
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#define LCD_DAH_HDS_BIT 16
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#define LCD_DAH_HDS_MASK (0xffff << LCD_DAH_HDS_BIT)
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#define LCD_DAH_HDE_BIT 0
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#define LCD_DAH_HDE_MASK (0xffff << LCD_DAH_HDE_BIT)
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#define LCD_DAV_VDS_BIT 16
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#define LCD_DAV_VDS_MASK (0xffff << LCD_DAV_VDS_BIT)
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#define LCD_DAV_VDE_BIT 0
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#define LCD_DAV_VDE_MASK (0xffff << LCD_DAV_VDE_BIT)
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#define LCD_CTRL_BST_BIT 28
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#define LCD_CTRL_BST_MASK (0x03 << LCD_CTRL_BST_BIT)
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#define LCD_CTRL_BST_4 (0 << LCD_CTRL_BST_BIT)
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#define LCD_CTRL_BST_8 (1 << LCD_CTRL_BST_BIT)
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#define LCD_CTRL_BST_16 (2 << LCD_CTRL_BST_BIT)
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#define LCD_CTRL_RGB555 (1 << 27)
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#define LCD_CTRL_OFUP (1 << 26)
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#define LCD_CTRL_FRC_BIT 24
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#define LCD_CTRL_FRC_MASK (0x03 << LCD_CTRL_FRC_BIT)
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#define LCD_CTRL_FRC_16 (0 << LCD_CTRL_FRC_BIT)
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#define LCD_CTRL_FRC_4 (1 << LCD_CTRL_FRC_BIT)
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#define LCD_CTRL_FRC_2 (2 << LCD_CTRL_FRC_BIT)
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#define LCD_CTRL_PDD_BIT 16
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#define LCD_CTRL_PDD_MASK (0xff << LCD_CTRL_PDD_BIT)
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#define LCD_CTRL_EOFM (1 << 13)
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#define LCD_CTRL_SOFM (1 << 12)
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#define LCD_CTRL_OFUM (1 << 11)
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#define LCD_CTRL_IFUM0 (1 << 10)
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#define LCD_CTRL_IFUM1 (1 << 9)
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#define LCD_CTRL_LDDM (1 << 8)
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#define LCD_CTRL_QDM (1 << 7)
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#define LCD_CTRL_BEDN (1 << 6)
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#define LCD_CTRL_PEDN (1 << 5)
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#define LCD_CTRL_DIS (1 << 4)
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#define LCD_CTRL_ENA (1 << 3)
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#define LCD_CTRL_BPP_BIT 0
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#define LCD_CTRL_BPP_MASK (0x07 << LCD_CTRL_BPP_BIT)
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#define LCD_CTRL_BPP_1 (0 << LCD_CTRL_BPP_BIT)
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#define LCD_CTRL_BPP_2 (1 << LCD_CTRL_BPP_BIT)
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#define LCD_CTRL_BPP_4 (2 << LCD_CTRL_BPP_BIT)
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#define LCD_CTRL_BPP_8 (3 << LCD_CTRL_BPP_BIT)
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#define LCD_CTRL_BPP_16 (4 << LCD_CTRL_BPP_BIT)
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#define LCD_STATE_QD (1 << 7)
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#define LCD_STATE_EOF (1 << 5)
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#define LCD_STATE_SOF (1 << 4)
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#define LCD_STATE_OFU (1 << 3)
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#define LCD_STATE_IFU0 (1 << 2)
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#define LCD_STATE_IFU1 (1 << 1)
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#define LCD_STATE_LDD (1 << 0)
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#define LCD_CMD_SOFINT (1 << 31)
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#define LCD_CMD_EOFINT (1 << 30)
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#define LCD_CMD_PAL (1 << 28)
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#define LCD_CMD_LEN_BIT 0
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#define LCD_CMD_LEN_MASK (0xffffff << LCD_CMD_LEN_BIT)
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static void udelay (unsigned us):
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for unsigned i = 0; i < us; ++i:
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for unsigned k = 0; k < 100; ++k:
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IE (2) &= ~SPEN
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static void mdelay (unsigned ms):
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udelay (1000 * ms)
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static unsigned int get_pllout ():
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unsigned plcr = CPM_PLCR1
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if (plcr & CPM_PLCR1_PLL1EN)
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unsigned nf, nr, no
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unsigned od[4] = {1, 2, 2, 4}
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nf = (plcr & CPM_PLCR1_PLL1FD_MASK) >> CPM_PLCR1_PLL1FD_BIT
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nr = (plcr & CPM_PLCR1_PLL1RD_MASK) >> CPM_PLCR1_PLL1RD_BIT
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no = od[((plcr & CPM_PLCR1_PLL1OD_MASK) >> CPM_PLCR1_PLL1OD_BIT)]
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return (JZ_EXTAL) / ((nr+2) * no) * (nf+2)
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else
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return JZ_EXTAL
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// level is in the range [0, 300]
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static void set_backlight (unsigned level):
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DUT = level
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if level:
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CTR = 0xbf
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D (2) |= PWM_ENABLE
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else:
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CTR = 0x3f
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D (2) &= ~PWM_ENABLE
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// Write to a register. Value must be in range [0, 0xff].
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static void write_reg (unsigned reg, unsigned value):
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unsigned data = (reg << 0xa) | 0x200 | value
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D (2) |= SPEN
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D (2) = (D (2) & ~SPDA) | SPCK
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D (2) &= ~SPEN
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udelay(25)
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for unsigned i = 0; i < 16; ++i:
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D (2) &= ~SPCK
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if data & 0x8000:
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D (2) |= SPDA
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else:
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D (2) &= ~SPDA
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udelay (25)
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D (2) |= SPCK
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udelay (25)
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data <<= 1
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D (2) |= SPEN
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udelay(200)
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static void lcd_enable ():
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udelay (50)
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D (2) &= ~LCD_RET
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mdelay(150)
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D (2) |= LCD_RET
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mdelay(10)
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// These values have been copied from the linux source.
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// I have no idea what they do.
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write_reg (0x00, 0x03)
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write_reg (0x01, 0x40)
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write_reg (0x02, 0x11)
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write_reg (0x03, 0xcd)
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write_reg (0x04, 0x32)
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write_reg (0x05, 0x0e)
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write_reg (0x07, 0x03)
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write_reg (0x08, 0x08)
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write_reg (0x09, 0x32)
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write_reg (0x0A, 0x88)
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write_reg (0x0B, 0xc6)
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write_reg (0x0C, 0x20)
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write_reg (0x0D, 0x20)
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set_backlight (300)
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static void lcd_disable ():
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write_reg (0x00, 0x03)
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set_backlight (0)
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static void reset ():
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// Use gpio pins as pwm.
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AUR (2) = (AUR (2) & ~0x0fffffff) | 0x50000000
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// Use gpio pins as lcd master.
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ALR (1) = (ALR (1) & ~0x0000ffff) | 0x55550000
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AUR (1) = 0x556a5555
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// initialize things.
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IE(2) &= ~(PWM_ENABLE | LCD_RET | SPEN | SPCK | SPDA)
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DI(2) |= PWM_ENABLE | LCD_RET | SPEN | SPCK | SPDA
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udelay (50)
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D (2) &= ~LCD_RET
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mdelay (150)
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D (2) |= LCD_RET
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mdelay (10)
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lcd_enable ()
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// For now, support only 16 bpp.
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// Screen is 800x480 tft.
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LCD_CTRL = LCD_CTRL_BPP_16 | LCD_CTRL_BST_16
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LCD_VSYNC = 20
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LCD_HSYNC = 80
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LCD_DAV = (20 << 16) | 500
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LCD_DAH = (80 << 16) | 880
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LCD_VAT = (880 << 16) | 500
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LCD_CFG = MODE_TFT_GEN | PCLK_N | VSYNC_N
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// Stop lcd.
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CPM_MSCR |= 1 << 7
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unsigned pclk = 60 * (800 * 3 + 80) * 500
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unsigned pllout = get_pllout ()
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CPM_CFCR2 = pllout / pclk - 1
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unsigned v = pllout / (pclk * 4) - 1
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while v < 0xf && pllout / (v + 1) > 150000000:
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++v
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CPM_CFCR = (CPM_CFCR & ~CPM_CFCR_LFR_MASK) | (v << CPM_CFCR_LFR_BIT) | CPM_CFCR_UPE
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// Start lcd.
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CPM_MSCR &= ~(1 << 7)
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mdelay (1)
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static void map_io (unsigned physical, unsigned address):
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Capability page = memory_create_page (__my_memory)
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alloc_physical (page, physical, 0)
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memory_map (__my_memory, page, address, 1)
|
||
|
|
//drop (page)
|
||
|
|
|
||
|
|
int main ():
|
||
|
|
map_io (0x10010000, gpio_address)
|
||
|
|
map_io (0x10050000, pwm_address)
|
||
|
|
map_io (0x13050000, lcd_address)
|
||
|
|
map_io (0x10000000, cpm_address)
|
||
|
|
|
||
|
|
reset ()
|
||
|
|
|
||
|
|
while true:
|
||
|
|
Message msg
|
||
|
|
if !wait (&msg):
|
||
|
|
continue
|
||
|
|
switch msg.protected_data:
|
||
|
|
case LCD_BACKLIGHT:
|
||
|
|
set_backlight (c.data[0] > 300 ? 300 : c.data[0])
|
||
|
|
break
|
||
|
|
case LCD_RESET:
|
||
|
|
reset ()
|
||
|
|
break
|