2009-05-20 23:07:56 +03:00
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#pypp 0
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2009-06-01 15:26:42 +03:00
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// Iris: micro-kernel for a capability-based operating system.
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// mips/arch.ccp: Most mips-specific parts.
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// Copyright 2009 Bas Wijnen <wijnen@debian.org>
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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2009-05-22 23:48:49 +03:00
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#define ARCH
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2009-06-01 15:26:42 +03:00
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#include "../kernel.hh"
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2009-05-20 23:07:56 +03:00
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void Thread_arch_init (Thread *thread):
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thread->arch.at = 0
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thread->arch.v0 = 0
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thread->arch.v1 = 0
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thread->arch.a0 = 0
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thread->arch.a1 = 0
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thread->arch.a2 = 0
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thread->arch.a3 = 0
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thread->arch.t0 = 0
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thread->arch.t1 = 0
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thread->arch.t2 = 0
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thread->arch.t3 = 0
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thread->arch.t4 = 0
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thread->arch.t5 = 0
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thread->arch.t6 = 0
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thread->arch.t7 = 0
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thread->arch.t8 = 0
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thread->arch.t9 = 0
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thread->arch.gp = 0
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thread->arch.fp = 0
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thread->arch.ra = 0
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thread->arch.hi = 0
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thread->arch.lo = 0
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thread->arch.k0 = 0
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thread->arch.k1 = 0
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2009-06-10 23:54:12 +03:00
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void Thread_arch_receive (Thread *thread, unsigned protected_data, Capability::Context *c):
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2009-06-08 14:46:13 +03:00
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thread->arch.a0 = (unsigned)c->cap[0]
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thread->arch.a1 = (unsigned)c->cap[1]
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thread->arch.a2 = (unsigned)c->cap[2]
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thread->arch.a3 = (unsigned)c->cap[3]
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thread->arch.t0 = c->data[0]
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thread->arch.t1 = c->data[1]
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thread->arch.t2 = c->data[2]
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thread->arch.t3 = c->data[3]
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2009-06-10 23:54:12 +03:00
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thread->arch.v1 = protected_data
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2009-05-25 01:31:35 +03:00
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thread->arch.v0 = 1
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void Thread_arch_receive_fail (Thread *thread):
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thread->arch.v0 = 0
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2009-05-27 19:33:05 +03:00
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unsigned *Thread_arch_info (Thread *thread, unsigned num):
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switch num:
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case 1:
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return &thread->arch.at
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case 2:
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return &thread->arch.v0
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case 3:
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return &thread->arch.v1
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case 4:
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return &thread->arch.a0
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case 5:
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return &thread->arch.a1
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case 6:
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return &thread->arch.a2
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case 7:
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return &thread->arch.a3
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case 8:
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return &thread->arch.t0
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case 9:
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return &thread->arch.t1
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case 10:
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return &thread->arch.t2
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case 11:
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return &thread->arch.t3
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case 12:
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return &thread->arch.t4
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case 13:
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return &thread->arch.t5
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case 14:
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return &thread->arch.t6
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case 15:
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return &thread->arch.t7
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case 16:
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return &thread->arch.s0
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case 17:
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return &thread->arch.s1
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case 18:
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return &thread->arch.s2
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case 19:
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return &thread->arch.s3
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case 20:
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return &thread->arch.s4
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case 21:
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return &thread->arch.s5
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case 22:
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return &thread->arch.s6
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case 23:
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return &thread->arch.s7
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case 24:
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return &thread->arch.t8
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case 25:
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return &thread->arch.t9
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case 26:
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return &thread->arch.k0
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case 27:
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return &thread->arch.k1
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case 28:
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return &thread->arch.gp
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case 29:
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return &thread->sp
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case 30:
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return &thread->arch.fp
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case 31:
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return &thread->arch.ra
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default:
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return NULL
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2009-05-20 23:07:56 +03:00
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void Memory_arch_init (Memory *mem):
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2009-05-24 13:22:22 +03:00
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mem->arch.asid = 1
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2009-05-20 23:07:56 +03:00
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mem->arch.directory = NULL
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2009-05-26 01:42:47 +03:00
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mem->arch.shadow = NULL
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2009-05-20 23:07:56 +03:00
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2009-05-24 13:22:22 +03:00
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static void flush_tlb (unsigned asid):
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for unsigned tlb = 1; tlb < 32; ++tlb:
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cp0_set (CP0_INDEX, tlb)
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__asm__ volatile ("tlbr")
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unsigned hi
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cp0_get (CP0_ENTRY_HI, hi)
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if (hi & 0x1f) == asid:
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// Set asid to 0, which is only used by the idle task.
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cp0_set (CP0_ENTRY_HI, 0x2000 * tlb)
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__asm__ volatile ("tlbwi")
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2009-05-20 23:07:56 +03:00
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void Memory_arch_free (Memory *mem):
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2009-05-26 01:42:47 +03:00
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while mem->arch.first_page_table:
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mem->unmap (mem->arch.first_page_table->first_page->page, mem->arch.first_page_table->first_page->mapping)
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2009-05-24 13:22:22 +03:00
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if (Memory *)asids[mem->arch.asid] == mem:
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flush_tlb (mem->arch.asid)
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asids[mem->arch.asid] = asids[0]
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asids[0] = mem->arch.asid
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2009-05-20 23:07:56 +03:00
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mem->unuse ()
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2009-05-22 23:48:49 +03:00
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mem->zfree ((unsigned)mem->arch.directory)
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2009-05-20 23:07:56 +03:00
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2009-05-26 01:42:47 +03:00
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static arch_page_table *alloc_page_table (Memory *mem):
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arch_page_table *ret = (arch_page_table *)mem->search_free (sizeof (arch_page_table), (void **)&mem->arch.first_page_table)
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if !ret:
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return NULL
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ret->first_page = NULL
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return ret
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static arch_page *alloc_page (Memory *mem, arch_page_table *t):
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arch_page *ret = (arch_page *)mem->search_free (sizeof (arch_page), (void **)&t->first_page)
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if !ret:
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return NULL
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ret->page = NULL
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ret->mapping = ~0
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ret->prev_mapped = NULL
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ret->next_mapped = NULL
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return ret
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static void free_page_table (arch_page_table *t, unsigned idx):
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Memory *mem = t->address_space
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if t->next:
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t->next->prev = t->prev
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if t->prev:
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t->prev->next = t->next
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else:
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mem->arch.first_page_table = t->next
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mem->zfree ((unsigned)mem->arch.directory[idx])
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mem->arch.directory[idx] = NULL
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mem->arch.shadow[idx] = NULL
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mem->free_obj (t)
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if !mem->arch.first_page_table:
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mem->zfree ((unsigned)mem->arch.directory)
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mem->zfree ((unsigned)mem->arch.shadow)
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mem->arch.directory = NULL
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mem->arch.shadow = NULL
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2009-06-01 02:12:54 +03:00
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static void tlb_reset (unsigned address, unsigned asid, unsigned value):
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cp0_set (CP0_ENTRY_HI, address | asid)
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__asm__ volatile ("tlbp")
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unsigned idx
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cp0_get (CP0_INDEX, idx)
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if ~idx & 0x80000000:
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if address & (1 << PAGE_BITS):
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cp0_set (CP0_ENTRY_LO1, value)
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else:
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cp0_set (CP0_ENTRY_LO0, value)
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__asm__ volatile ("tlbwi")
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2009-05-26 01:42:47 +03:00
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static void free_page (arch_page_table *t, arch_page *p):
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if p->next:
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p->next->prev = p->prev
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if p->prev:
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p->prev->next = p->next
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else:
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t->first_page = p->next
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if p->prev_mapped:
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p->prev_mapped->next_mapped = p->next_mapped
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else:
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p->page->arch.first_mapped = p->next_mapped
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if p->next_mapped:
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p->next_mapped->prev_mapped = p->prev_mapped
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2009-06-01 02:12:54 +03:00
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tlb_reset (p->mapping, p->address_space->arch.asid, 0)
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2009-05-26 01:42:47 +03:00
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unsigned idx = p->mapping >> 21
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p->address_space->free_obj (p)
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if !t->first_page:
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free_page_table (t, idx)
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2009-06-01 02:12:54 +03:00
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static unsigned make_entry_lo (Page *page, bool write):
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if !page->data.frame:
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return 0
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unsigned flags
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2009-06-08 14:46:13 +03:00
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if page->data.flags & PAGE_FLAG_UNCACHED:
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flags = 0x10 | 0x2
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else:
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2009-06-01 02:12:54 +03:00
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flags = 0x18 | 0x2
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2009-06-08 14:46:13 +03:00
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if write:
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flags |= 0x4
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2009-06-01 02:12:54 +03:00
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return ((page->data.frame & ~0x80000000) >> 6) | flags
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2009-05-20 23:07:56 +03:00
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bool Memory_arch_map (Memory *mem, Page *page, unsigned address, bool write):
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2009-06-01 02:12:54 +03:00
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if address >= 0x80000000:
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return false
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address &= PAGE_MASK
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2009-05-23 21:55:31 +03:00
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if !mem->arch.directory:
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mem->arch.directory = (unsigned **)mem->zalloc ()
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if !mem->arch.directory:
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return false
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2009-05-26 01:42:47 +03:00
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mem->arch.shadow = (arch_page_table **)mem->zalloc ()
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if !mem->arch.shadow:
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mem->zfree ((unsigned)mem->arch.directory)
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mem->arch.directory = NULL
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return false
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unsigned *table = mem->arch.directory[address >> 21]
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arch_page_table *t = mem->arch.shadow[address >> 21]
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2009-05-20 23:07:56 +03:00
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if !table:
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table = (unsigned *)mem->zalloc ()
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if !table:
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2009-05-26 01:42:47 +03:00
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if !mem->arch.first_page_table:
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mem->zfree ((unsigned)mem->arch.directory)
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mem->zfree ((unsigned)mem->arch.shadow)
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2009-05-27 15:38:52 +03:00
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mem->arch.directory = NULL
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mem->arch.shadow = NULL
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2009-05-26 01:42:47 +03:00
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return false
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t = alloc_page_table (mem)
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if !t:
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mem->zfree ((unsigned)table)
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if !mem->arch.first_page_table:
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mem->zfree ((unsigned)mem->arch.directory)
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mem->zfree ((unsigned)mem->arch.shadow)
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2009-05-27 15:38:52 +03:00
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mem->arch.directory = NULL
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mem->arch.shadow = NULL
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2009-05-20 23:07:56 +03:00
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return false
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2009-05-26 01:42:47 +03:00
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mem->arch.directory[address >> 21] = table
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2009-05-27 15:38:52 +03:00
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mem->arch.shadow[address >> 21] = t
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2009-05-26 01:42:47 +03:00
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arch_page *p = alloc_page (mem, t)
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if !p:
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if !t->first_page:
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// This automatically cleans up the rest.
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free_page_table (t, address >> 21)
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return false
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unsigned idx = (address >> 12) & ((1 << 9) - 1)
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2009-05-20 23:07:56 +03:00
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if table[idx]:
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2009-05-26 01:42:47 +03:00
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mem->unmap ((Page *)table[idx + 0x200], address)
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2009-06-01 02:12:54 +03:00
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table[idx] = make_entry_lo (page, write)
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2009-05-26 01:42:47 +03:00
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table[idx + 0x200] = (unsigned)p
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2009-06-01 02:12:54 +03:00
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p->mapping = address + write
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2009-05-26 01:42:47 +03:00
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p->page = page
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p->next_mapped = page->arch.first_mapped
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if p->next_mapped:
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p->next_mapped->prev_mapped = p
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page->arch.first_mapped = p
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2009-05-23 21:55:31 +03:00
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return true
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2009-05-20 23:07:56 +03:00
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void Memory_arch_unmap (Memory *mem, Page *page, unsigned address):
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2009-05-26 01:42:47 +03:00
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unsigned didx = address >> 21
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unsigned tidx = (address >> 12) & ((1 << 9) - 1)
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unsigned *table = mem->arch.directory[didx]
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arch_page_table *t = mem->arch.shadow[didx]
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table[tidx] = 0
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arch_page *p = (arch_page *)table[tidx + 0x200]
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table[tidx + 0x200] = 0
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free_page (t, p)
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2009-05-20 23:07:56 +03:00
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2009-05-24 13:22:22 +03:00
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Page *Memory_arch_get_mapping (Memory *mem, unsigned address, bool *writable):
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2009-06-01 02:12:54 +03:00
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if address >= 0x80000000:
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return NULL
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2009-05-26 01:42:47 +03:00
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unsigned *table = mem->arch.directory[address >> 21]
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unsigned idx = (address >> 12) & ((1 << 9) - 1)
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arch_page *page = (arch_page *)table[idx + 0x200]
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2009-05-24 13:22:22 +03:00
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if writable:
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2009-06-01 02:12:54 +03:00
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*writable = table[idx] & 4
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2009-05-26 01:42:47 +03:00
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return page->page
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2009-05-20 23:07:56 +03:00
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2009-05-29 00:35:27 +03:00
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void Page_arch_update_mapping (Page *page):
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2009-06-01 02:12:54 +03:00
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if !page->arch.first_mapped:
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return
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Memory *as = page->address_space
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unsigned target = make_entry_lo (page, page->data.flags & PAGE_FLAG_WRITABLE)
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for arch_page *p = page->arch.first_mapped; p; p = p->next_mapped:
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unsigned de = p->mapping >> 21
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unsigned te = (p->mapping >> 12) & ((1 << 9) - 1)
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bool write = p->mapping & 1
|
|
|
|
unsigned t
|
|
|
|
if p->mapping & 1:
|
|
|
|
t = target
|
|
|
|
else:
|
|
|
|
t = target & ~0x4
|
|
|
|
as->arch.directory[de][te] = t
|
|
|
|
tlb_reset (p->mapping & ~1, as->arch.asid, t)
|
2009-05-29 00:35:27 +03:00
|
|
|
|
2009-05-23 21:55:31 +03:00
|
|
|
void arch_invoke ():
|
2009-06-08 14:46:13 +03:00
|
|
|
Capability *target
|
|
|
|
bool wait
|
2009-05-25 01:31:35 +03:00
|
|
|
Thread *caller = current
|
|
|
|
target = caller->address_space->find_capability (current->arch.v0, &wait)
|
2009-05-20 23:07:56 +03:00
|
|
|
if !target:
|
|
|
|
// TODO: there must be no action here. This is just because the rest doesn't work yet.
|
2009-06-08 14:46:13 +03:00
|
|
|
dbg_send (3, 2)
|
2009-05-20 23:07:56 +03:00
|
|
|
schedule ()
|
2009-05-25 01:31:35 +03:00
|
|
|
// Calling an invalid capability always fails.
|
|
|
|
caller->arch.v0 = 0
|
2009-05-27 15:38:52 +03:00
|
|
|
else:
|
2009-05-27 19:33:05 +03:00
|
|
|
if wait:
|
|
|
|
caller->wait ()
|
2009-06-08 14:46:13 +03:00
|
|
|
Capability::Context c
|
|
|
|
c.cap[0] = caller->address_space->find_capability (caller->arch.a0, &c.copy[0])
|
|
|
|
c.cap[1] = caller->address_space->find_capability (caller->arch.a1, &c.copy[1])
|
|
|
|
c.cap[2] = caller->address_space->find_capability (caller->arch.a2, &c.copy[2])
|
|
|
|
c.cap[3] = caller->address_space->find_capability (caller->arch.a3, &c.copy[3])
|
|
|
|
c.data[0] = caller->arch.t0
|
|
|
|
c.data[1] = caller->arch.t1
|
|
|
|
c.data[2] = caller->arch.t2
|
|
|
|
c.data[3] = caller->arch.t3
|
|
|
|
caller->arch.v0 = target->invoke (&c) ? 1 : 0
|
|
|
|
if !current:
|
|
|
|
if caller != &idle && (caller->flags & (THREAD_FLAG_RUNNING | THREAD_FLAG_WAITING)) == THREAD_FLAG_RUNNING:
|
|
|
|
current = caller
|
|
|
|
else:
|
|
|
|
schedule ()
|
|
|
|
if !current:
|
|
|
|
current = &idle
|
2009-05-25 01:31:35 +03:00
|
|
|
if caller != current:
|
|
|
|
if (Memory *)asids[current->address_space->arch.asid] != current->address_space:
|
|
|
|
if asids[0]:
|
|
|
|
current->address_space->arch.asid = asids[0]
|
|
|
|
asids[0] = asids[asids[0]]
|
|
|
|
else:
|
|
|
|
static unsigned random = 1
|
|
|
|
current->address_space->arch.asid = random
|
|
|
|
// Overwrite used asid, so flush those values from tlb.
|
|
|
|
flush_tlb (random)
|
|
|
|
++random
|
|
|
|
if random >= 64:
|
|
|
|
random = 1
|
2009-05-27 15:38:52 +03:00
|
|
|
asids[current->address_space->arch.asid] = (unsigned)current->address_space
|
2009-05-25 01:31:35 +03:00
|
|
|
cp0_set (CP0_ENTRY_HI, current->address_space->arch.asid)
|
2009-05-26 01:42:47 +03:00
|
|
|
directory = current->address_space->arch.directory
|
2009-05-27 15:38:52 +03:00
|
|
|
unsigned status
|
|
|
|
cp0_get (CP0_STATUS, status)
|
|
|
|
status &= 0x0fffffff
|
|
|
|
if current->flags & THREAD_FLAG_PRIV:
|
|
|
|
status |= 0x10000000
|
|
|
|
cp0_set (CP0_STATUS, status | 0x13)
|
2009-05-27 19:33:05 +03:00
|
|
|
|
|
|
|
void arch_register_interrupt (unsigned num, Receiver *r):
|
|
|
|
arch_interrupt_receiver[num] = r
|
|
|
|
unsigned status
|
|
|
|
cp0_get (CP0_STATUS, status)
|
2009-06-01 02:12:54 +03:00
|
|
|
// And enable or disable the interrupt.
|
|
|
|
if r:
|
|
|
|
status |= 1 << (num + 8)
|
|
|
|
else:
|
|
|
|
status &= ~(1 << (num + 8))
|
|
|
|
cp0_set (CP0_STATUS, status)
|