iris/source/nand.ccp

#pypp 0
// Iris: micro-kernel for a capability-based operating system.
// boot-programs/nand.ccp: NAND driver.
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program.  If not, see <http://www.gnu.org/licenses/>.

#include "devices.hh"
#define ARCH
#include "arch.hh"

// The following defines are taken from mtd/nand.h in the Linux source.

// Standard NAND flash commands
#define CMD_READ0		0
#define CMD_READ1		1
#define CMD_RNDOUT		5
#define CMD_PAGEPROG		0x10
#define CMD_READOOB		0x50
#define CMD_ERASE1		0x60
#define CMD_STATUS		0x70
#define CMD_STATUS_MULTI	0x71
#define CMD_SEQIN		0x80
#define CMD_RNDIN		0x85
#define CMD_READID		0x90
#define CMD_ERASE2		0xd0
#define CMD_RESET		0xff

// Extended commands for large page devices
#define CMD_READSTART		0x30
#define CMD_RNDOUTSTART		0xE0
#define CMD_CACHEDPROG		0x15

// Extended commands for AG-AND device
// Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but
// there is no way to distinguish that from NAND_CMD_READ0
// until the remaining sequence of commands has been completed
// so add a high order bit and mask it off in the command.
#define CMD_DEPLETE1		0x100
#define CMD_DEPLETE2		0x38
#define CMD_STATUS_MULTI	0x71
#define CMD_STATUS_ERROR	0x72
// multi-bank error status (banks 0-3)
#define CMD_STATUS_ERROR0	0x73
#define CMD_STATUS_ERROR1	0x74
#define CMD_STATUS_ERROR2	0x75
#define CMD_STATUS_ERROR3	0x76
#define CMD_STATUS_RESET	0x7f
#define CMD_STATUS_CLEAR	0xff

#define CMD_NONE		-1

// Status bits
#define STATUS_FAIL		0x01
#define STATUS_FAIL_N1		0x02
#define STATUS_TRUE_READY	0x20
#define STATUS_READY		0x40
#define STATUS_WP		0x80

static volatile char *command
static volatile char *address
static volatile char *data

static unsigned page_bits
static unsigned redundant_bits
static unsigned block_bits
static unsigned word_size

static void unbusy ():
	while !(gpio_get_port (2) & (1 << 30)):
		Iris::schedule ()

static void reset ():
	Iris::Page data_page = Iris::my_memory.create_page ()
	Iris::Page command_page = Iris::my_memory.create_page ()
	Iris::Page address_page = Iris::my_memory.create_page ()

	unsigned base = 0x18000000
	data_page.alloc_physical (base, false, false)
	command_page.alloc_physical (base + 0x8000, false, false)
	address_page.alloc_physical (base + 0x10000, false, false)

	Iris::my_memory.map (data_page, (unsigned)data)
	Iris::my_memory.map (command_page, (unsigned)command)
	Iris::my_memory.map (address_page, (unsigned)address)

	Iris::free_cap (data_page)
	Iris::free_cap (command_page)
	Iris::free_cap (address_page)

	// Set up.
	gpio_as_nand ()
	EMC_NFCSR = EMC_NFCSR_NFE1 | EMC_NFCSR_NFCE1

	// Reset nand.
	*command = CMD_RESET
	unbusy ()

	*command = CMD_READID
	*address = 0
	unsigned d = *data
	//unsigned maker = d
	d = *data
	//unsigned device = d
	d = *data
	//unsigned internal_chip_number = 1 << (d & 0x3)
	//unsigned cell_type = 2 << ((d >> 2) & 0x3)
	//unsigned simultaneously_programmed_pages = 1 << ((d >> 4) & 0x3)
	//bool can_interleave_program_between_chips = d & 0x40
	//bool can_cache_program = d & 0x80
	d = *data
	page_bits = 10 + (d & 3)
	kdebug ("page bits: ")
	kdebug_num (page_bits)
	kdebug ("\n")
	redundant_bits = (d & 4 ? 4 : 3)
	block_bits = 64 + ((d >> 4) & 3)
	word_size = (d & 0x40 ? 16 : 8)
	//unsigned serial_access_minimum = (d & 0x80 ? 25 : 50)
	d = *data
	//unsigned num_planes = 1 << ((d >> 2) & 3) 
	//unsigned plane_bits = 26 + ((d >> 4) & 7)

static void read (unsigned a, char *buffer):
	unsigned column = a & ((1 << page_bits) - 1)
	unsigned row = a >> page_bits
	kdebug ("reading: ")
	kdebug_num (a)
	kdebug ("/")
	kdebug_num (row)
	kdebug ("/")
	kdebug_num (column)
	kdebug (": ")
	*command = CMD_READ0
	*address = column
	*address = column >> 8
	*address = row
	*address = row >> 8
	*address = row >> 16
	*command = CMD_READSTART
	EMC_NFECR = EMC_NFECR_ECCE | EMC_NFECR_RS | EMC_NFECR_RS_DECODING | EMC_NFECR_ERST
	// Wait for nand to be ready.
	unbusy ()
	for unsigned t = 0; t < 0x200; ++t:
		buffer[t] = *data
	char error[9]
	unsigned errcol = (1 << page_bits) + (column >> 5)
	*command = CMD_RNDOUT
	*address = errcol
	*address = errcol >> 8
	*command = CMD_RNDOUTSTART
	for unsigned t = 0; t < 9; ++t:
		error[t] = *data
	EMC_NFPAR (0) = ((unsigned *)error)[0]
	EMC_NFPAR (1) = ((unsigned *)error)[1]
	EMC_NFPAR (2) = error[9]
	EMC_NFECR = EMC_NFECR_ECCE | EMC_NFECR_RS | EMC_NFECR_RS_DECODING | EMC_NFECR_PRDY
	while !(EMC_NFINTS & EMC_NFINTS_DECF):
		Iris::schedule ()
	// delay...
	//Iris::schedule ()
	unsigned errs = (EMC_NFINTS & EMC_NFINTS_ERRCNT_MASK) >> EMC_NFINTS_ERRCNT_BIT

Iris::Num start ():
	for unsigned i = 0; i < 30; ++i:
		Iris::schedule ()
	map_emc ()
	map_gpio ()

	command = (volatile char *)0x15000
	address = (volatile char *)0x16000
	data = (volatile char *)0x17000

	reset ()

	char buffer[0x200]

	// Send nand contents to serial port.
	for unsigned a = 0; a < 0x4000; a += 0x200:
		read (a, buffer)
		//for unsigned s = 0; s < 0x10; ++s:
			for unsigned t = 0; t < 0x10; ++t:
				kdebug (" ")
				kdebug_num (buffer[0 * 0x20 + t], 2)
			kdebug ("\n")
		//kdebug ("\n")
	// Exit.
	return 0