iris/mips/boot.S

// Iris: micro-kernel for a capability-based operating system.
// mips/boot.S: Kernel entry point, called by the boot loader.
// Copyright 2009 Bas Wijnen <wijnen@debian.org>
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program.  If not, see <http://www.gnu.org/licenses/>.

	// The kernel stack.
	.lcomm kernel_stack, KERNEL_STACK_SIZE

	.globl __start
	.globl thread_start
	.set noreorder

#define Status 12
#define Config 16

__start:
	bal 1f
	nop
	.word _gp
// For some reason the disassembler considers everything
// after __start non-code until the next label.  So I add a label.
start_hack_for_disassembler:
1:	lw $gp, 0($ra)

	la $sp, kernel_stack + KERNEL_STACK_SIZE

	// TODO: flush cache and optionally refill it.

	// Set kseg0 cachable.
	li $k0, 0x3
	mtc0 $k0, $Config, 0

	// Jump into cached code.
	la $t9, 1f
	jr $t9
	nop
1:

	// Clear .bss
	la $a0, _edata
	la $a1, _end
1:	sw $zero, 0($a0)
	bne $a1, $a0, 1b
	addu $a0, 4

	// First argument is the memory size: 128 megabytes.
	li $a0, 128 << 20
	la $t9, init
	jr $t9
	nop

thread_start:
	.word thread0
	.word thread1
	.word thread2