diff --git a/boot-programs/keyboard.ccp b/boot-programs/keyboard.ccp
index fb8e8d1..c57374f 100644
--- a/boot-programs/keyboard.ccp
+++ b/boot-programs/keyboard.ccp
@@ -16,9 +16,9 @@
// You should have received a copy of the GNU General Public License
// along with this program. If not, see .
-#include
#include "devices.hh"
-#include "jz4730.hh"
+#define ARCH
+#include "arch.hh"
// GPIO pins for the keyboard: (port.pin)
// Cols = 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 3.10, 3.11, 3.12, 3.13, 3.14, 3.15, 3.29
diff --git a/boot-programs/lcd.ccp b/boot-programs/lcd.ccp
index 2e08030..6707c9f 100644
--- a/boot-programs/lcd.ccp
+++ b/boot-programs/lcd.ccp
@@ -16,9 +16,9 @@
// You should have received a copy of the GNU General Public License
// along with this program. If not, see .
-#include
-#include "jz4730.hh"
#include "devices.hh"
+#define ARCH
+#include "arch.hh"
// Pin definitions, all in port 2.
#define PWM_ENABLE (1 << 30)
diff --git a/mips/Makefile.arch b/mips/Makefile.arch
index df779fe..313edfb 100644
--- a/mips/Makefile.arch
+++ b/mips/Makefile.arch
@@ -35,7 +35,7 @@ uimage:
mips/entry.o: $(boot_threads)
mips/init.o: TARGET_FLAGS = -I/usr/include
$(boot_threads): TARGET_FLAGS = -I.
-$(boot_threads): boot-programs/jz4730.hh boot-programs/devices.hh
+$(boot_threads): mips/jz4730.hh boot-programs/devices.hh
# Transform ':' into ';' so vim doesn't think there are errors.
uimage: kernel.raw.gz Makefile mips/Makefile.arch
diff --git a/mips/arch.hhp b/mips/arch.hhp
index b3248f2..21afc14 100644
--- a/mips/arch.hhp
+++ b/mips/arch.hhp
@@ -20,6 +20,11 @@
#define _ARCH_HH
#ifdef ARCH
+
+#ifndef ASM
+#include "jz4730.hh"
+#endif
+
#define reg_hack(x...) #x
#define cp0_get(reg, target) do { __asm__ volatile ("mfc0 %0, $" reg_hack(reg) : "=r" (target)); } while (0)
#define cp0_set(reg, value) do { __asm__ volatile ("mtc0 %0, $" reg_hack(reg) :: "r" (value)); } while (0)
@@ -59,8 +64,10 @@
#define CP0_DATA_HI 29, 1
#define CP0_ERROR_EPC 30
#define CP0_DESAVE 31
+
#endif
+#ifdef __KERNEL
// register save positions in Thread
#define SAVE_PC (5 * 4)
#define SAVE_SP (SAVE_PC + 4)
@@ -157,6 +164,8 @@ extern unsigned thread_start[NUM_THREADS + 1]
// Fast pointer to page directory, for tlb miss events
extern unsigned **directory
-#endif // defined ASM
+#endif // not defined ASM
+
+#endif // defined __KERNEL
#endif
diff --git a/mips/entry.S b/mips/entry.S
index d290688..a0ed170 100644
--- a/mips/entry.S
+++ b/mips/entry.S
@@ -25,6 +25,7 @@
#define ARCH
#define ASM
+#define __KERNEL
#include "arch.hh"
addr_000:
diff --git a/boot-programs/jz4730.hhp b/mips/jz4730.hhp
similarity index 99%
rename from boot-programs/jz4730.hhp
rename to mips/jz4730.hhp
index e8b013a..25ac33f 100644
--- a/boot-programs/jz4730.hhp
+++ b/mips/jz4730.hhp
@@ -2,44 +2,8 @@
#ifndef __JZ4730_HH__
#define __JZ4730_HH__
-#include
-
#define JZ_EXTAL 3686400
-// Base addresses are the place where the pages are mapped.
-#define HARB_BASE 0x00000000
-#define EMC_BASE 0x00001000
-#define DMAC_BASE 0x00002000
-#define UHC_BASE 0x00003000
-#define UDC_BASE 0x00004000
-#define LCD_BASE 0x00005000
-#define CIM_BASE 0x00006000
-#define ETH_BASE 0x00007000
-#define NBM_BASE 0x00008000
-#define CPM_BASE 0x00009000
-#define INTC_BASE 0x0000a000
-#define OST_BASE 0x0000b000
-#define RTC_BASE 0x0000c000
-#define WDT_BASE 0x0000d000
-#define GPIO_BASE 0x0000e000
-#define AIC_BASE 0x0000f000
-#define MSC_BASE 0x00010000
-#define UART0_BASE 0x00011000
-#define UART1_BASE 0x00012000
-#define UART2_BASE 0x00013000
-#define UART3_BASE 0x00014000
-#define FIR_BASE 0x00015000
-#define SCC_BASE 0x00016000
-#define SCC0_BASE 0x00017000
-#define I2C_BASE 0x00018000
-#define SSI_BASE 0x00019000
-#define SCC1_BASE 0x0001a000
-#define PWM0_BASE 0x0001b000
-#define PWM1_BASE 0x0001c000
-#define DES_BASE 0x0001d000
-#define UPRT_BASE 0x0001e000
-#define KBC_BASE 0x0001f000
-
// Physical addresses are where they really are.
// (In kernel space you need to add 0xa0000000 to see them unmapped uncached in kseg2.)
#define HARB_PHYSICAL 0x13000000
@@ -75,6 +39,76 @@
#define UPRT_PHYSICAL 0x10061000
#define KBC_PHYSICAL 0x10062000
+#ifdef __KERNEL
+#define HARB_BASE (HARB_PHYSICAL + 0xa0000000)
+#define EMC_BASE (EMC_PHYSICAL + 0xa0000000)
+#define DMAC_BASE (DMAC_PHYSICAL + 0xa0000000)
+#define UHC_BASE (UHC_PHYSICAL + 0xa0000000)
+#define UDC_BASE (UDC_PHYSICAL + 0xa0000000)
+#define LCD_BASE (LCD_PHYSICAL + 0xa0000000)
+#define CIM_BASE (CIM_PHYSICAL + 0xa0000000)
+#define ETH_BASE (ETH_PHYSICAL + 0xa0000000)
+#define NBM_BASE (NBM_PHYSICAL + 0xa0000000)
+#define CPM_BASE (CPM_PHYSICAL + 0xa0000000)
+#define INTC_BASE (INTC_PHYSICAL + 0xa0000000)
+#define OST_BASE (OST_PHYSICAL + 0xa0000000)
+#define RTC_BASE (RTC_PHYSICAL + 0xa0000000)
+#define WDT_BASE (WDT_PHYSICAL + 0xa0000000)
+#define GPIO_BASE (GPIO_PHYSICAL + 0xa0000000)
+#define AIC_BASE (AIC_PHYSICAL + 0xa0000000)
+#define MSC_BASE (MSC_PHYSICAL + 0xa0000000)
+#define UART0_BASE (UART0_PHYSICAL + 0xa0000000)
+#define UART1_BASE (UART1_PHYSICAL + 0xa0000000)
+#define UART2_BASE (UART2_PHYSICAL + 0xa0000000)
+#define UART3_BASE (UART3_PHYSICAL + 0xa0000000)
+#define FIR_BASE (FIR_PHYSICAL + 0xa0000000)
+#define SCC_BASE (SCC_PHYSICAL + 0xa0000000)
+#define SCC0_BASE (SCC0_PHYSICAL + 0xa0000000)
+#define I2C_BASE (I2C_PHYSICAL + 0xa0000000)
+#define SSI_BASE (SSI_PHYSICAL + 0xa0000000)
+#define SCC1_BASE (SCC1_PHYSICAL + 0xa0000000)
+#define PWM0_BASE (PWM0_PHYSICAL + 0xa0000000)
+#define PWM1_BASE (PWM1_PHYSICAL + 0xa0000000)
+#define DES_BASE (DES_PHYSICAL + 0xa0000000)
+#define UPRT_BASE (UPRT_PHYSICAL + 0xa0000000)
+#define KBC_BASE (KBC_PHYSICAL + 0xa0000000)
+
+#else
+#include
+// Base addresses are the place where the pages are mapped.
+#define HARB_BASE 0x00000000
+#define EMC_BASE 0x00001000
+#define DMAC_BASE 0x00002000
+#define UHC_BASE 0x00003000
+#define UDC_BASE 0x00004000
+#define LCD_BASE 0x00005000
+#define CIM_BASE 0x00006000
+#define ETH_BASE 0x00007000
+#define NBM_BASE 0x00008000
+#define CPM_BASE 0x00009000
+#define INTC_BASE 0x0000a000
+#define OST_BASE 0x0000b000
+#define RTC_BASE 0x0000c000
+#define WDT_BASE 0x0000d000
+#define GPIO_BASE 0x0000e000
+#define AIC_BASE 0x0000f000
+#define MSC_BASE 0x00010000
+#define UART0_BASE 0x00011000
+#define UART1_BASE 0x00012000
+#define UART2_BASE 0x00013000
+#define UART3_BASE 0x00014000
+#define FIR_BASE 0x00015000
+#define SCC_BASE 0x00016000
+#define SCC0_BASE 0x00017000
+#define I2C_BASE 0x00018000
+#define SSI_BASE 0x00019000
+#define SCC1_BASE 0x0001a000
+#define PWM0_BASE 0x0001b000
+#define PWM1_BASE 0x0001c000
+#define DES_BASE 0x0001d000
+#define UPRT_BASE 0x0001e000
+#define KBC_BASE 0x0001f000
+
// Map IO memory (requires a priviledged __my_thread capability).
static void __map_io (unsigned physical, unsigned mapping):
Capability page = memory_create_page (__my_memory)
@@ -83,6 +117,7 @@ static void __map_io (unsigned physical, unsigned mapping):
// 1 means writable.
memory_map (__my_memory, page, mapping, 1)
//drop (page)
+#endif
// Physical addresses are where they really are.
#define map_harb() do { __map_io (HARB_PHYSICAL, HARB_BASE); } while (0)