diff --git a/invoke.ccp b/invoke.ccp
index e9a2a82..84afeb6 100644
--- a/invoke.ccp
+++ b/invoke.ccp
@@ -853,7 +853,7 @@ static void kernel_invoke (unsigned target, Kernel::Num protected_data, kCapabil
 	return
 
 void invoke (kReceiverP target, Kernel::Num protected_data, kCapability::Context *c):
-	//log_message ("invoke", (unsigned)target, protected_data.l, c)
+	log_message ("invoke", (unsigned)target, protected_data.l, c)
 	if (unsigned)target & ~KERNEL_MASK:
 		// This is not a kernel capability: send a message to the receiver.
 		if must_wait:
diff --git a/kernel.hhp b/kernel.hhp
index 1bf13df..8cdaa71 100644
--- a/kernel.hhp
+++ b/kernel.hhp
@@ -280,5 +280,6 @@ void kCapability::invoke (kCapability::Context *c):
 	::invoke (target, protected_data, c)
 
 #define assert(x) do { if (!(x)) panic (__LINE__, "assertion failed"); } while (0)
+#define dbg_log_line() do { dbg_log ("debug: line "); dbg_log_num (__LINE__); dbg_log_char ('\n'); } while (0)
 
 #endif
diff --git a/mips/init.ccp b/mips/init.ccp
index 4823fa3..30a7846 100644
--- a/mips/init.ccp
+++ b/mips/init.ccp
@@ -232,7 +232,7 @@ void init (unsigned mem):
 	#endif
 	must_wait = false
 	// Disable interrupts and set interrupt vectors to normal.
-	cp0_set0 (CP0_STATUS)
+	cp0_set (CP0_STATUS, 0x00404304)
 	// Initialize kernel variables to empty.
 	unsigned count = init_memory (mem)
 	// initialize system control coprocessor.
diff --git a/mips/nanonote/Makefile.arch b/mips/nanonote/Makefile.arch
index 711142d..9e90784 100644
--- a/mips/nanonote/Makefile.arch
+++ b/mips/nanonote/Makefile.arch
@@ -18,7 +18,7 @@
 load = 0x80000000
 
 ARCH_CXXFLAGS = -DNUM_THREADS=2
-ARCH_CPPFLAGS = -I. -Imips -Imips/nanonote -Wa,-mips32 -DNANONOTE
+ARCH_CPPFLAGS = -I. -Imips -Imips/nanonote -Wa,-mips32 -DNANONOTE -DUSE_SERIAL
 CROSS = mipsel-linux-gnu-
 OBJDUMP = $(CROSS)objdump
 junk = mdebug.abi32 reginfo comment pdr
@@ -31,7 +31,7 @@ arch_headers = mips/arch.hh mips/nanonote/jz4740.hh mips/nanonote/board.hh
 boot_threads = init udc
 
 test: iris.raw nanonote-boot
-	./nanonote-boot iris.raw 0xa$(shell /bin/sh -c '$(OBJDUMP) -t iris | grep __start$$ | cut -b2-8')
+	./nanonote-boot iris.raw 0xa$(shell /bin/sh -c '$(OBJDUMP) -t iris.elf | grep __start$$ | cut -b2-8')
 .PHONY: test
 
 %.elf: %.o
diff --git a/mips/nanonote/board.ccp b/mips/nanonote/board.ccp
index bb161ee..1885775 100644
--- a/mips/nanonote/board.ccp
+++ b/mips/nanonote/board.ccp
@@ -21,6 +21,7 @@
 #include "kernel.hh"
 
 void board_init ():
+	pll_init ()
 	cpm_start_all ()
 	gpio_as_uart0 ()
 	gpio_as_sdram_16bit ()
@@ -40,12 +41,16 @@ void board_init ():
 	tcu_unmask_full_match_irq (0)
 	tcu_start_counter (0)
 	// Set up uart.
-	uart_disable (0)
-	uart_set_baud (0, JZ_EXTAL, 9600)
-	uart_set_8n1 (0)
 	UART0_IER = 0
+	UART0_FCR = 0
 	UART0_MCR = 0
 	UART0_SIRCR = 0
 	UART0_UMR = 0
 	UART0_UACR = 0
-	UART0_FCR |= UARTFCR_UUE | UARTFCR_RFLS | UARTFCR_TFLS
+	UART0_LCR = UARTLCR_WLEN_8 | UARTLCR_STOP1 | UARTLCR_DLAB
+	unsigned uart_div = 3000000 / 16 / 9600
+	UART0_DLHR = uart_div >> 8
+	UART0_DLLR = uart_div
+	UART0_LCR = UARTLCR_WLEN_8 | UARTLCR_STOP1
+	UART0_FCR = UARTFCR_UUE | UARTFCR_FE | UARTFCR_RFLS | UARTFCR_TFLS
+	dbg_log ("Serial port initialized\n")
diff --git a/mips/nanonote/jz4740.hhp b/mips/nanonote/jz4740.hhp
index 30e646c..7ee9b7f 100644
--- a/mips/nanonote/jz4740.hhp
+++ b/mips/nanonote/jz4740.hhp
@@ -2346,6 +2346,19 @@ static void gpio_disable_pull (unsigned p, unsigned pins):
 //**************************************************************************
 // CPM
 //**************************************************************************
+static void pll_init ():
+	unsigned PHM_DIV = 3
+	unsigned int cfcr, plcr1
+	int n2FR[33] = { 0, 0, 1, 2, 3, 0, 4, 0, 5, 0, 0, 0, 6, 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 9 }
+	int nf, pllout2;
+	cfcr = CPM_CPCCR_CLKOEN | (n2FR[1] << CPM_CPCCR_CDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_HDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_PDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_MDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_LDIV_BIT)
+	pllout2 = (cfcr & CPM_CPCCR_PCS) ? 252000000 : (252000000 / 2)
+	CPM_UHCCDR = pllout2 / 48000000 - 1
+	nf = 252000000 * 2 / 12000000
+	plcr1 = ((nf - 2) << CPM_CPPCR_PLLM_BIT) | (0 << CPM_CPPCR_PLLN_BIT) | (0 << CPM_CPPCR_PLLOD_BIT) | (0x20 << CPM_CPPCR_PLLST_BIT) | CPM_CPPCR_PLLEN
+	CPM_CPCCR = cfcr
+	CPM_CPPCR = plcr1
+
 static unsigned cpm_get_pllm ():
 	return (CPM_CPPCR & CPM_CPPCR_PLLM_MASK) >> CPM_CPPCR_PLLM_BIT
 static unsigned cpm_get_plln ():
diff --git a/mips/nanonote/nanonote-boot.ccp b/mips/nanonote/nanonote-boot.ccp
index 2960825..a1cf1f9 100644
--- a/mips/nanonote/nanonote-boot.ccp
+++ b/mips/nanonote/nanonote-boot.ccp
@@ -77,7 +77,7 @@ bool nanonote::try_open (struct usb_device *dev):
 		return false
 
 	interface = dev->config->interface->altsetting->bInterfaceNumber
-	int have_in = 0, have_out = 0
+	bool have_in = false, have_out = false
 	for unsigned i = 0; i < dev->config->interface->altsetting->bNumEndpoints; ++i:
 		if (dev->config->interface->altsetting->endpoint[i].bmAttributes & USB_ENDPOINT_TYPE_MASK) != USB_ENDPOINT_TYPE_BULK:
 			usb_close (handle)
@@ -89,7 +89,7 @@ bool nanonote::try_open (struct usb_device *dev):
 				usb_close (handle)
 				std::cerr << "Device has multiple IN endpoints.\n"
 				return false
-			have_in = 1
+			have_in = true
 			in_ep = dev->config->interface->altsetting->endpoint[i].bEndpointAddress & USB_ENDPOINT_ADDRESS_MASK
 			if in_ep != 1:
 				usb_close (handle)
@@ -101,7 +101,7 @@ bool nanonote::try_open (struct usb_device *dev):
 				usb_close (handle)
 				std::cerr << "Device has multiple OUT endpoints.\n"
 				return false
-			have_out = 1
+			have_out = true
 			out_ep = dev->config->interface->altsetting->endpoint[i].bEndpointAddress & USB_ENDPOINT_ADDRESS_MASK
 			if out_ep != 1:
 				usb_close (handle)
diff --git a/mips/nanonote/sdram-setup.ccp b/mips/nanonote/sdram-setup.ccp
index 94fd1b5..e24723f 100644
--- a/mips/nanonote/sdram-setup.ccp
+++ b/mips/nanonote/sdram-setup.ccp
@@ -134,3 +134,19 @@ void start_cpp ():
 	EMC_DMCR = dmcr | EMC_DMCR_RFSH | EMC_DMCR_MRSET
 
 	// everything is ok now: return to boot loader to load stage 2.
+
+	pll_init ()
+	cpm_start_all ()
+	gpio_as_uart0 ()
+	UART0_IER = 0
+	UART0_FCR = 0
+	UART0_MCR = 0
+	UART0_SIRCR = 0
+	UART0_UMR = 0
+	UART0_UACR = 0
+	UART0_LCR = UARTLCR_WLEN_8 | UARTLCR_STOP1 | UARTLCR_DLAB
+	unsigned uart_div = 3000000 / 16 / 9600
+	UART0_DLHR = uart_div >> 8
+	UART0_DLLR = uart_div
+	UART0_LCR = UARTLCR_WLEN_8 | UARTLCR_STOP1
+	UART0_FCR = UARTFCR_UUE | UARTFCR_FE | UARTFCR_RFLS | UARTFCR_TFLS