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mirror of git://projects.qi-hardware.com/iris.git synced 2025-04-21 12:27:27 +03:00

Make it work with new gcc version; use linker script to force entry code in page 0.

This commit is contained in:
Bas Wijnen
2015-07-01 01:48:10 -04:00
parent fa021a80f0
commit 2d803d5650
16 changed files with 263 additions and 204 deletions

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@@ -55,7 +55,7 @@ start_hack_for_disassembler:
la $sp, kernel_stack + KERNEL_STACK_SIZE
// Clear .bss
la $a0, _edata
la $a0, _bss
la $a1, _end
1: sw $zero, 0($a0)
bne $a1, $a0, 1b

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@@ -17,6 +17,7 @@
#define KERNEL_STACK_SIZE 0x1000
// The kernel stack.
.bss
.lcomm kernel_stack, KERNEL_STACK_SIZE
.globl run_idle
@@ -24,24 +25,30 @@
.set noat
.set noreorder
.text
#define ARCH
#define ASM
#define __KERNEL__
#include "arch.hh"
.org 0x000
addr_000:
#if 1
// TLB refill
lui $k0, 0x8000
lw $k1, 0x174($k0) // directory
mfc0 $k0, $CP0_ENTRY_HI
// Entry high is address: 12 bit offset in page; 1 bit even/odd; 9 bit which page pair; 10 bit which table.
srl $k0, $k0, 19
andi $k0, $k0, 0xffc
andi $k0, $k0, 0xffc // Bits 30:21 remain: which page table to get from directory.
addu $k0, $k0, $k1
lw $k0, 0($k0)
lw $k0, 0($k0) // k0 is the page table.
beq $zero, $k0, zero_refill
mfc0 $k1, $CP0_ENTRY_HI
srl $k1, $k1, 10
// Bits 20:13 remain: which page pair to get from page table.
// (Only the lower half is used for this; the upper half contains pointers to the kPages.)
andi $k1, $k1, 0x7f8
addu $k0, $k0, $k1
lw $k1, 0($k0)
@@ -66,7 +73,8 @@ zero_refill:
jr $t9
nop
#endif
.fill 0x100 - (. - addr_000)
.org 0x100
addr_100:
// Cache error
move $k1, $ra
@@ -75,8 +83,8 @@ addr_100:
la $t9, cache_error
jr $t9
nop
.fill 0x180 - (. - addr_000) - 3 * 4
.org 0x180 - 3 * 4
directory: // 0x174
.word 0
current: // 0x178
@@ -92,9 +100,8 @@ addr_180:
la $t9, exception
jr $t9
nop
// This is annoying; it must fill it up so addr_200 is right. For some
// reason .fill 0x200 - (. - addr_000) - 2 * 4 doesn't work here.
.fill 0x60
.org 0x200 - 2 * 4
.word 0x00000012 // 1f8 EntryLo data for idle page.
.word 0x80000000 // 1fc A pointer to the current page.
addr_200:
@@ -105,8 +112,8 @@ addr_200:
la $t9, interrupt
jr $t9
nop
.fill 0x280 - (. - addr_000)
.org 0x280
start_idle: // 280
// Wait for the next interrupt, then the first thread will be scheduled.
// It is impractical to try to call schedule, because for that the
@@ -221,3 +228,6 @@ save_regs:
la $ra, kernel_exit
jr $t9
nop
.set at
.set reorder

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@@ -310,7 +310,16 @@ void init (unsigned mem):
// Say we're handling an exception. Since we're going to enter the idle task, allow access to cp0.
// All interrupts enter the CPU through the interrupt controller at IP2, so enable that.
cp0_set (CP0_STATUS, 0x1000ff13)
cp0_set (CP0_STATUS, 0x10000413)
for int a = 0; a < 0x300; a += 0x80:
kdebug("addr ")
kdebug_num(a)
kdebug(":")
for int b = 0; b < 0x10; b += 4:
kdebug(" ")
kdebug_num(*(unsigned *)(0x80000000 | (a + b)))
kdebug('\n')
kdebug ("entering idle task\n")
// Done; return to user space (the idle task).

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@@ -50,13 +50,13 @@ static kThread *handle_exit ():
current->address_space->arch.asid = asids[0]
asids[0] = asids[asids[0]]
else:
static unsigned random = 1
current->address_space->arch.asid = random
// Overwrite used asid, so flush those values from tlb.
flush_tlb (random)
static unsigned random
++random
if random >= 64:
random = 1
current->address_space->arch.asid = random
// Overwrite used asid, so flush those values from tlb.
flush_tlb (random)
asids[current->address_space->arch.asid] = (unsigned)current->address_space
cp0_set (CP0_ENTRY_HI, current->address_space->arch.asid)
directory = current->address_space->arch.directory

23
mips/nanonote/iris.ld Normal file
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@@ -0,0 +1,23 @@
OUTPUT_ARCH(mips)
ENTRY(__start)
MEMORY
{
ram : ORIGIN = 0x80000000 , LENGTH = 32M
}
SECTIONS
{
.text : { "mips/iris_elf-entry.o" (.text*) } > ram
.text : { *(.text*) } > ram
.rodata : { *(.rodata*) *(.note*) } > ram
.sdata : { *(.sdata*) } > ram
.data : { *(.data*) *(.scommon*) *(.reginfo*) } > ram
_gp = ABSOLUTE(.);
.got : { *(.got*) } > ram
_bss = ABSOLUTE(.);
.sbss : { *(.sbss*) } > ram
.bss : { *(.bss*) } > ram
_end = ABSOLUTE(.);
}

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@@ -49,7 +49,7 @@ base:
addiu $v1, $v1, 32
// Set a1 to start address of image.
addiu $a1, $ra, image - base
addiu $a1, $ra, image - base + ADDR0 - 0x80000000
// Set a2 to end address of image.
lw $a2, 0($ra)