mirror of
git://projects.qi-hardware.com/iris.git
synced 2024-07-01 01:26:43 +03:00
make udc work
This commit is contained in:
Bas Wijnen
parent
20d15f0745
commit
431b38acb9
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@ -73,11 +73,13 @@ static void setup ():
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char const *decode_kbd = "0123456789abcdefghijklmnopqrstuvwxyz!@#$%^&*() T\n[],.-=/\\;|`'UDLREIKBPFZMS{}CA\":"
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Kernel::Num start ():
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// Set up lcd first
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Kernel::schedule ()
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kdebug ("init started\n")
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setup ()
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kdebug ("init set up\n")
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while true:
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kdebug ("init waiting\n")
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Kernel::wait ()
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kdebug ("init done waiting\n")
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switch Kernel::recv.protected_data.value ():
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case KBD:
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unsigned code = Kernel::recv.data[0].l
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@ -130,14 +130,13 @@ class Udc:
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char configuration
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unsigned size
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char const *ptr
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unsigned send_next (unsigned old_csr)
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unsigned vendor (unsigned old_csr, Setup *s)
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unsigned get_descriptor (unsigned old_csr, unsigned type, unsigned idx, unsigned len)
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bool vendor (Setup *s)
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bool get_descriptor (unsigned type, unsigned idx, unsigned len)
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bool handle_setup (Setup *s)
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public:
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void init ()
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void log (unsigned c)
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void interrupt ()
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unsigned handle_setup (unsigned old_csr, Setup *s)
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Udc::Device const Udc::device_descriptor = { sizeof (Device), Device::Type, 0x200, 0, 0, 0, max_packet_size0, 0x601a, 0x4740, 0x100, 1, 2, 0, 1 }
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Udc::my_config const Udc::config_descriptor = {
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@ -150,6 +149,7 @@ Udc::my_config const Udc::config_descriptor = {
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Udc::String <7> const Udc::s_manufacturer = { sizeof (String <7>), String <7>::Type, { 'I', 'n', 'g', 'e', 'n', 'i', 'c' } }
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Udc::String <22> const Udc::s_product = { sizeof (String <22>), String <22>::Type, { 'J', 'Z', '4', '7', '4', '0', ' ', 'U', 'S', 'B', ' ', 'B', 'o', 'o', 't', ' ', 'D', 'e', 'v', 'i', 'c', 'e'} }
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void Udc::init ():
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kdebug ("udc: init\n")
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state = IDLE
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configuration = 0
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size = 0
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@ -162,36 +162,32 @@ void Udc::init ():
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UDC_INTRUSB = UDC_INTR_RESET
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// enable interrupts on endpoint 0.
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UDC_INTRINE |= 1 << 0
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UDC_INDEX = 0
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unsigned Udc::send_next (unsigned old_csr):
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for unsigned i = 0; size > 0 && i < max_packet_size0; ++i, --size:
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// Use 8-bit transfers to avoid problems with alignment.
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REG8 (UDC_FIFO_EP0) = *ptr++
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if size:
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state = TX
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return (old_csr | UDC_CSR0_INPKTRDY) & ~UDC_CSR0_DATAEND
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else:
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state = IDLE
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return old_csr | UDC_CSR0_INPKTRDY
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unsigned Udc::vendor (unsigned old_csr, Setup *s):
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bool Udc::vendor (Setup *s):
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kdebug ("udc: vendor\n")
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if s->request_type & 0x80:
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ptr = "abcdefgh"
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kdebug ("udc: vendorsend\n")
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static char const *name = "abcdefgh"
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ptr = name
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size = 8
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return send_next (old_csr)
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return old_csr
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state = TX
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return true
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kdebug ("udc: vendorrecv\n")
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return true
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unsigned Udc::get_descriptor (unsigned old_csr, unsigned type, unsigned idx, unsigned len):
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bool Udc::get_descriptor (unsigned type, unsigned idx, unsigned len):
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kdebug ("udc: getdesc\n")
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switch type:
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case Configuration::Type:
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if idx != 1:
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return old_csr | UDC_CSR0_SENDSTALL
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return false
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ptr = reinterpret_cast <char const *> (&config_descriptor)
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size = (len < sizeof (config_descriptor) ? len : sizeof (config_descriptor))
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break
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case Device::Type:
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if idx != 0:
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return old_csr | UDC_CSR0_SENDSTALL
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return false
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ptr = reinterpret_cast <char const *> (&device_descriptor)
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size = (len < sizeof (device_descriptor) ? len : sizeof (device_descriptor))
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break
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@ -207,13 +203,23 @@ unsigned Udc::get_descriptor (unsigned old_csr, unsigned type, unsigned idx, uns
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size = (len < sizeof (s_product) ? len : sizeof (s_product))
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break
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default:
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return old_csr | UDC_CSR0_SENDSTALL
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return false
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break
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default:
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return old_csr | UDC_CSR0_SENDSTALL
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return send_next (old_csr)
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return false
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state = TX
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return true
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unsigned Udc::handle_setup (unsigned old_csr, Setup *s):
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bool Udc::handle_setup (Setup *s):
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kdebug ("udc: setup: type=")
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kdebug_num (s->request_type)
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kdebug ("; request=")
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kdebug_num (s->request)
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kdebug ("; value=")
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kdebug_num (s->value)
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kdebug ("; index=")
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kdebug_num (s->index)
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kdebug ("\n")
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switch s->request_type:
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case STANDARD_TO_DEVICE:
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switch s->request:
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@ -222,49 +228,55 @@ unsigned Udc::handle_setup (unsigned old_csr, Setup *s):
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break
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case SET_CONFIGURATION:
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if s->value >= 2:
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return old_csr | UDC_CSR0_SENDSTALL
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return false
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configuration = s->value
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break
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case SET_INTERFACE:
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if s->value != 0:
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return old_csr | UDC_CSR0_SENDSTALL
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return false
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break
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default:
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return old_csr | UDC_CSR0_SENDSTALL
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return false
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break
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case STANDARD_FROM_DEVICE:
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switch s->request:
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case GET_STATUS:
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ptr = "\0\0"
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size = (s->length < 2 ? s->length : 2)
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return send_next (old_csr)
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state = TX
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break
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case GET_DESCRIPTOR:
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return get_descriptor (old_csr, (s->value >> 8) & 0xff, s->value & 0xff, s->length)
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return get_descriptor ((s->value >> 8) & 0xff, s->value & 0xff, s->length)
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case GET_CONFIGURATION:
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ptr = &configuration
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size = (s->length < 1 ? s->length : 1)
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return send_next (old_csr)
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state = TX
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break
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case GET_INTERFACE:
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ptr = "\0"
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size = (s->length < 1 ? s->length : 1)
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return send_next (old_csr)
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state = TX
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break
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default:
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return old_csr | UDC_CSR0_SENDSTALL
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return false
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break
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case VENDOR_TO_DEVICE:
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case VENDOR_FROM_DEVICE:
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return vendor (old_csr, s)
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return vendor (s)
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default:
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return old_csr | UDC_CSR0_SENDSTALL
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return old_csr
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return false
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return true
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void Udc::interrupt ():
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kdebug ("udc: inter\n")
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unsigned i = UDC_INTRUSB
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if i & UDC_INTR_RESET:
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kdebug ("udc: reset\n")
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state = IDLE
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return
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i = UDC_INTRIN
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if i & (1 << 0):
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kdebug ("udc: ep0\n")
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// Interrupt on endpoint 0.
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unsigned csr = UDC_CSR0
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if csr & UDC_CSR0_SENTSTALL:
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@ -275,39 +287,68 @@ void Udc::interrupt ():
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state = IDLE
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switch state:
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case IDLE:
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kdebug ("udc: idle\n")
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if !(csr & UDC_CSR0_OUTPKTRDY):
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break
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csr |= UDC_CSR0_SVDOUTPKTRDY | UDC_CSR0_DATAEND
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return
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kdebug ("udc: packet\n")
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union { unsigned d[2]; Setup s; } packet
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packet.d[0] = UDC_FIFO_EP0
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packet.d[1] = UDC_FIFO_EP0
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csr = handle_setup (csr, &packet.s)
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UDC_CSR0 = csr
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break
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packet.d[0] = UDC_FIFO (0)
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packet.d[1] = UDC_FIFO (0)
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UDC_CSR0 = csr | UDC_CSR0_DATAEND | UDC_CSR0_SVDOUTPKTRDY
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if !handle_setup (&packet.s):
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csr |= UDC_CSR0_SENDSTALL
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break
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if size == 0:
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return
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// Fall through.
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case TX:
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UDC_CSR0 = send_next (UDC_CSR0 | UDC_CSR0_DATAEND)
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kdebug ("udc: send next:")
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unsigned i
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for i = 0; (size & ~3) > 0 && i < max_packet_size0; i += 4, size -= 4:
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for unsigned i = 0; i < 4; ++i:
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kdebug_num (ptr[i], 2)
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UDC_FIFO (0) = *(unsigned *)ptr
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ptr += 4
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for ; size > 0 && i < max_packet_size0; ++i, --size:
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kdebug_num (*ptr, 2)
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UDC_FIFO8 (0) = *ptr++
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kdebug ("\n")
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if i == max_packet_size0:
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csr |= UDC_CSR0_INPKTRDY
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else:
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state = IDLE
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csr |= UDC_CSR0_INPKTRDY | UDC_CSR0_DATAEND
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break
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case RX:
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// Not supported.
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UDC_CSR0 |= UDC_CSR0_SENDSTALL
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csr |= UDC_CSR0_SVDOUTPKTRDY | UDC_CSR0_SENDSTALL
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state = IDLE
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break
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UDC_CSR0 = csr
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void Udc::log (unsigned c):
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kdebug ("udc: log\n")
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Kernel::Num start ():
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map_udc ()
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Udc udc
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kdebug ("udc: start\n")
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udc.init ()
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kdebug ("udc: done init\n")
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Kernel::Cap logcap = Kernel::my_receiver.create_capability (Init::LOG)
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kdebug ("udc: made cap\n")
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__asm__ volatile ("li $a0, 1\nlw $a1, %0\nbreak" :: "m"(logcap.code): "a0", "a1", "memory")
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kdebug ("udc: registered cap\n")
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Kernel::register_interrupt (IRQ_UDC)
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kdebug ("udc: registered interrupt\n")
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while true:
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kdebug ("udc: waiting\n")
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Kernel::wait ()
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switch Kernel::recv.protected_data.l:
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case IRQ_UDC:
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udc.interrupt ()
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Kernel::register_interrupt (IRQ_UDC)
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break
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case Init::LOG:
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udc.log (Kernel::recv.data[0].l)
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30
invoke.ccp
30
invoke.ccp
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@ -21,38 +21,36 @@
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static void log_message (char const *prefix, unsigned target, unsigned pdata, kCapability::Context *c):
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if !dbg_code.l:
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dbg_log (prefix)
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dbg_log (": ")
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dbg_log (": caller=")
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dbg_log_num ((unsigned)old_current)
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dbg_log (" > ")
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dbg_log ("; target=")
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dbg_log_num (target)
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dbg_log (":")
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dbg_log ("; pdata=")
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dbg_log_num (pdata)
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dbg_log ("/")
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dbg_log_num (c->data[0].l)
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dbg_log (" ")
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dbg_log ("; data=")
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dbg_log_num (c->data[0].h)
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dbg_log (":")
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dbg_log_num (c->data[0].l)
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dbg_log (",")
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dbg_log_num (c->data[1].l)
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dbg_log (" ")
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dbg_log_num (c->data[1].h)
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dbg_log (",")
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dbg_log_num (pdata)
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dbg_log (";")
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dbg_log (":")
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dbg_log_num (c->data[1].l)
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if c->reply.valid ():
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dbg_log ("; reply target=")
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dbg_log_num ((unsigned)c->reply->target)
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dbg_log (":")
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dbg_log ("; pdata=")
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dbg_log_num (c->reply->protected_data.l)
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dbg_log (",")
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if c->arg.valid ():
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dbg_log ("; arg target=")
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dbg_log_num ((unsigned)c->arg->target)
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dbg_log (":")
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dbg_log ("; pdata=")
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dbg_log_num (c->arg->protected_data.l)
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dbg_log ("\n")
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void kThread::raise (unsigned code, unsigned data):
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dpanic (code, "raise")
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dbg_log ("raise ")
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dbg_log_num ((unsigned)current)
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dbg_log_num ((unsigned)old_current)
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dbg_log_char ('/')
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if code < Kernel::NUM_EXCEPTION_CODES:
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dbg_log (Kernel::exception_name[code])
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@ -853,7 +851,7 @@ static void kernel_invoke (unsigned target, Kernel::Num protected_data, kCapabil
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return
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void invoke (kReceiverP target, Kernel::Num protected_data, kCapability::Context *c):
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log_message ("invoke", (unsigned)target, protected_data.l, c)
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//log_message ("invoke", (unsigned)target, protected_data.l, c)
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if (unsigned)target & ~KERNEL_MASK:
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// This is not a kernel capability: send a message to the receiver.
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if must_wait:
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@ -43,9 +43,11 @@
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#define CP0_ENTRY_HI 10
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#define CP0_COMPARE 11
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#define CP0_STATUS 12
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#define CP0_INT_CTL 12, 1
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#define CP0_CAUSE 13
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#define CP0_EPC 14
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#define CP0_P_R_ID 15
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#define CP0_EBASE 15, 1
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#define CP0_CONFIG 16
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#define CP0_CONFIG1 16, 1
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#define CP0_CONFIG2 16, 2
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@ -59,12 +59,16 @@ static void init_idle ():
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directory = idle_memory.arch.directory
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static void init_cp0 ():
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// Set timer to a defined value
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cp0_set (CP0_COMPARE, 1000000)
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// Reset timer
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cp0_set0 (CP0_COUNT)
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// Use the interrupt vector for interrupts
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// Disable watchpoint interrupts.
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cp0_set0 (CP0_WATCH_LO)
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// Use the interrupt vector for interrupts; clear interrupt pending flags.
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cp0_set (CP0_CAUSE, 1 << 23)
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// Disable interrupts and set interrupt vectors to normal.
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cp0_set0 (CP0_STATUS)
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// Reset exception base address.
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cp0_set0 (CP0_EBASE)
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// Use non-vectored interrupts.
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cp0_set0 (CP0_INT_CTL)
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// clear the tlb, hardwire page 0 to 0xffffffff
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// and soft-wire it to (0x294 << 20) + (0x290 << 10)
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@ -231,8 +235,6 @@ void init (unsigned mem):
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dbg_code = 0
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#endif
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must_wait = false
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// Disable interrupts and set interrupt vectors to normal.
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cp0_set (CP0_STATUS, 0x00404304)
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// Initialize kernel variables to empty.
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unsigned count = init_memory (mem)
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// initialize system control coprocessor.
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@ -266,6 +268,7 @@ void init (unsigned mem):
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// Initialize board-specific things.
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board_init ()
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intc_unmask_irq (TIMER_INTERRUPT)
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// Say we're handling an exception. Since we're going to enter the idle task, allow access to cp0.
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// All interrupts enter the CPU through the interrupt controller at IP2, so enable that.
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@ -228,9 +228,7 @@ kThread *exception ():
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dpanic (0, "no log capability provided")
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break
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break
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if dbg_cap.valid ():
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dbg_log_char (current->arch.a[1])
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break
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dbg_log_char (current->arch.a[1])
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#endif
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break
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case 10:
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@ -33,9 +33,9 @@ void board_init ():
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gpio_as_gpio (3, 0x05fc0000)
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tcu_stop_counter (0)
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tcu_select_extalclk (0)
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tcu_select_clk_div1 (0)
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tcu_select_clk_div4 (0)
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tcu_disable_pwm_output (0)
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tcu_set_full_data (0, JZ_EXTAL / HZ)
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tcu_set_full_data (0, JZ_EXTAL / HZ / 4)
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tcu_mask_half_match_irq (0)
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tcu_clear_full_match_flag (0)
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tcu_unmask_full_match_irq (0)
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@ -22,7 +22,7 @@
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#define __JZ4740_HH__
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// Main clock, for cpu, serial port, and with divisors for most other hardware
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#define JZ_EXTAL 3686400 /* 3.6864 MHz */
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#define JZ_EXTAL 12000000 /* 3.6864 MHz */
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// RTC clock
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#define RTC_CLOCK 32768 /* 32.768 KHz */
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// Interrupt source used for system timer
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@ -1883,17 +1883,16 @@ void cdelay (unsigned cs):
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#define UDC_TESTMODE REG8 (UDC_BASE + 0x0f) // USB test mode 8-bit
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#define UDC_CSR0 REG8 (UDC_BASE + 0x12) // EP0 CSR 8-bit
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#define UDC_INMAXP REG16 (UDC_BASE + 0x10) // EP1-2 IN Max Pkt Size 16-bit
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#define UDC_INCSR REG16 (UDC_BASE + 0x12) // EP1-2 IN CSR LSB 8/16bit
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#define UDC_INCSRH REG8 (UDC_BASE + 0x13) // EP1-2 IN CSR MSB 8-bit
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||||
#define UDC_OUTMAXP REG16 (UDC_BASE + 0x14) // EP1 OUT Max Pkt Size 16-bit
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||||
#define UDC_OUTCSR REG16 (UDC_BASE + 0x16) // EP1 OUT CSR LSB 8/16bit
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||||
#define UDC_OUTCSRH REG8 (UDC_BASE + 0x17) // EP1 OUT CSR MSB 8-bit
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#define UDC_OUTCOUNT REG16 (UDC_BASE + 0x18) // bytes in EP0/1 OUT FIFO 16-bit
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||||
#define UDC_INMAXP(ep) REG16 (UDC_BASE + 0x100 + 0x10 * (ep) + 0x10) // EP1-2 IN Max Pkt Size 16-bit
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||||
#define UDC_INCSR(ep) REG16 (UDC_BASE + 0x100 + 0x10 * (ep) + 0x12) // EP1-2 IN CSR LSB 8/16bit
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||||
#define UDC_INCSRH(ep) REG8 (UDC_BASE + 0x100 + 0x10 * (ep) + 0x13) // EP1-2 IN CSR MSB 8-bit
|
||||
#define UDC_OUTMAXP(ep) REG16 (UDC_BASE + 0x100 + 0x10 * (ep) + 0x14) // EP1 OUT Max Pkt Size 16-bit
|
||||
#define UDC_OUTCSR(ep) REG16 (UDC_BASE + 0x100 + 0x10 * (ep) + 0x16) // EP1 OUT CSR LSB 8/16bit
|
||||
#define UDC_OUTCSRH(ep) REG8 (UDC_BASE + 0x100 + 0x10 * (ep) + 0x17) // EP1 OUT CSR MSB 8-bit
|
||||
#define UDC_OUTCOUNT(ep) REG16 (UDC_BASE + 0x100 + 0x10 * (ep) + 0x18) // bytes in EP0/1 OUT FIFO 16-bit
|
||||
|
||||
#define UDC_FIFO_EP0 REG32 (UDC_BASE + 0x20)
|
||||
#define UDC_FIFO_EP1 REG32 (UDC_BASE + 0x24)
|
||||
#define UDC_FIFO_EP2 REG32 (UDC_BASE + 0x28)
|
||||
#define UDC_FIFO(ep) REG32 (UDC_BASE + 0x20 + 4 * (ep))
|
||||
#define UDC_FIFO8(ep) REG8 (UDC_BASE + 0x20 + 4 * (ep))
|
||||
|
||||
#define UDC_EPINFO REG32 (UDC_BASE + 0x78) // Endpoint information
|
||||
#define UDC_RAMINFO REG32 (UDC_BASE + 0x79) // RAM information
|
||||
|
|
@ -2354,7 +2353,7 @@ static void pll_init ():
|
|||
cfcr = CPM_CPCCR_CLKOEN | (n2FR[1] << CPM_CPCCR_CDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_HDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_PDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_MDIV_BIT) | (n2FR[PHM_DIV] << CPM_CPCCR_LDIV_BIT)
|
||||
pllout2 = (cfcr & CPM_CPCCR_PCS) ? 252000000 : (252000000 / 2)
|
||||
CPM_UHCCDR = pllout2 / 48000000 - 1
|
||||
nf = 252000000 * 2 / 12000000
|
||||
nf = 252000000 * 2 / JZ_EXTAL
|
||||
plcr1 = ((nf - 2) << CPM_CPPCR_PLLM_BIT) | (0 << CPM_CPPCR_PLLN_BIT) | (0 << CPM_CPPCR_PLLOD_BIT) | (0x20 << CPM_CPPCR_PLLST_BIT) | CPM_CPPCR_PLLEN
|
||||
CPM_CPCCR = cfcr
|
||||
CPM_CPPCR = plcr1
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include <fstream>
|
||||
#include <sstream>
|
||||
#include <iostream>
|
||||
#include <iomanip>
|
||||
|
||||
asm volatile (".section .rodata\n"
|
||||
".globl stage1\n"
|
||||
|
|
@ -165,8 +166,12 @@ void nanonote::boot (std::string const &data, unsigned load, unsigned start):
|
|||
send_file (load, data.size (), data.data ())
|
||||
request (VR_FLUSH_CACHES)
|
||||
request (VR_PROGRAM_START2, start)
|
||||
sleep (1)
|
||||
get_cpu_info ()
|
||||
std::cerr << "info: " << cpu_info << std::endl
|
||||
std::cerr << "info: ";
|
||||
for unsigned i = 0; i < cpu_info.size (); ++i:
|
||||
std::cerr << std::setfill ('0') << std::setw (2) << std::hex << (cpu_info[i] & 0xff);
|
||||
std::cerr << std::endl
|
||||
|
||||
int main (int argc, char **argv):
|
||||
if argc != 3:
|
||||
|
|
|
|||
|
|
@ -54,4 +54,3 @@ void board_init ():
|
|||
ost_set_count (0, 1)
|
||||
ost_set_mode (0, OST_TCSR_UIE | OST_TCSR_CKS_EXTAL)
|
||||
ost_enable_channel (0)
|
||||
intc_unmask_irq (IRQ_OST0)
|
||||
|
|
|
|||
|
|
@ -58,7 +58,9 @@ void panic_impl (unsigned n, unsigned line, char const *name, char const *messag
|
|||
#ifndef NDEBUG
|
||||
// If a log capability is registered, run its owner.
|
||||
if dbg_cap.valid () && dbg_cap->target->owner:
|
||||
#ifndef USE_SERIAL
|
||||
dbg_cap->target->owner->run ()
|
||||
#endif
|
||||
// Use the (now running) log thread to display the message.
|
||||
dbg_log ("Panic: caller = ")
|
||||
dbg_log_num ((unsigned)old_current)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user